Lines Matching refs:spec_reg
1938 void Disassembler::mrs(Condition cond, Register rd, SpecialRegister spec_reg) {
1941 << ", " << spec_reg;
1945 MaskedSpecialRegister spec_reg,
1949 << spec_reg << ", " << operand;
5340 SpecialFPRegister spec_reg) {
5343 << ", " << spec_reg;
5347 SpecialFPRegister spec_reg,
5351 << spec_reg << ", " << rt;
9518 unsigned spec_reg = ((instr >> 8) & 0xf) |
9521 // MSR{<c>}{<q>} <spec_reg>, <Rn> ; T1
9523 MaskedSpecialRegister(spec_reg),
9757 unsigned spec_reg = (instr >> 20) & 0x1;
9758 // MRS{<c>}{<q>} <Rd>, <spec_reg> ; T1
9761 SpecialRegister(spec_reg));
25185 unsigned spec_reg = (instr >> 16) & 0xf;
25187 switch (spec_reg) {
25191 // VMSR{<c>}{<q>} <spec_reg>, <Rt> ; T1
25193 SpecialFPRegister(spec_reg),
25303 unsigned spec_reg = (instr >> 16) & 0xf;
25304 switch (spec_reg) {
25311 // VMRS{<c>}{<q>} <Rt>, <spec_reg> ; T1
25314 SpecialFPRegister(spec_reg));
56761 unsigned spec_reg = (instr >> 22) & 0x1;
56762 // MRS{<c>}{<q>} <Rd>, <spec_reg> ; A1
56763 mrs(condition, Register(rd), SpecialRegister(spec_reg));
57046 unsigned spec_reg =
57049 // MSR{<c>}{<q>} <spec_reg>, <Rn> ; A1
57051 MaskedSpecialRegister(spec_reg),
62172 unsigned spec_reg =
62175 // MSR{<c>}{<q>} <spec_reg>, #<imm> ; A1
62176 msr(condition, MaskedSpecialRegister(spec_reg), imm);
67780 unsigned spec_reg = (instr >> 16) & 0xf;
67782 switch (spec_reg) {
67786 // VMSR{<c>}{<q>} <spec_reg>, <Rt> ; A1
67788 SpecialFPRegister(spec_reg),
67917 unsigned spec_reg = (instr >> 16) & 0xf;
67918 switch (spec_reg) {
67925 // VMRS{<c>}{<q>} <Rt>, <spec_reg> ; A1
67928 SpecialFPRegister(spec_reg));
