Lines Matching full:condition
184 Condition* cond,
235 Condition cond_;
255 void HandleOutOfBoundsImmediate(Condition cond, Register tmp, uint32_t imm);
339 MemOperand MemOperandComputationHelper(Condition cond,
355 MemOperand MemOperandComputationHelper(Condition cond,
428 Condition* cond = NULL) {
552 void Adr(Condition cond, Register rd, RawLiteral* literal) {
575 void Ldr(Condition cond, Register rt, RawLiteral* literal) {
596 void Ldrb(Condition cond, Register rt, RawLiteral* literal) {
617 void Ldrd(Condition cond, Register rt, Register rt2, RawLiteral* literal) {
641 void Ldrh(Condition cond, Register rt, RawLiteral* literal) {
662 void Ldrsb(Condition cond, Register rt, RawLiteral* literal) {
683 void Ldrsh(Condition cond, Register rt, RawLiteral* literal) {
704 void Vldr(Condition cond, DataType dt, DRegister rd, RawLiteral* literal) {
726 void Vldr(Condition cond, DRegister rd, RawLiteral* literal) {
733 void Vldr(Condition cond, DataType dt, SRegister rd, RawLiteral* literal) {
755 void Vldr(Condition cond, SRegister rd, RawLiteral* literal) {
763 void Ldr(Condition cond, Register rt, uint32_t v) {
777 void Ldrd(Condition cond, Register rt, Register rt2, uint64_t v) {
791 void Vldr(Condition cond, SRegister rd, float v) {
801 void Vldr(Condition cond, DRegister rd, double v) {
811 void Vmov(Condition cond, DRegister rt, double v) { Vmov(cond, F64, rt, v); }
813 void Vmov(Condition cond, SRegister rt, float v) { Vmov(cond, F32, rt, v); }
864 Condition cond,
870 Condition cond,
878 Condition cond,
886 Condition cond,
891 Condition cond,
898 Condition cond,
911 Condition cond,
918 Condition cond,
925 Condition cond,
932 Condition cond,
939 Condition cond,
944 Condition cond,
950 Condition cond,
957 Condition cond,
964 Condition cond,
971 Condition cond,
976 Condition cond,
982 Condition cond,
989 void Adc(Condition cond, Register rd, Register rn, const Operand& operand) {
1007 Condition cond,
1037 void Adcs(Condition cond, Register rd, Register rn, const Operand& operand) {
1051 void Add(Condition cond, Register rd, Register rn, const Operand& operand) {
1091 Condition cond,
1135 void Adds(Condition cond, Register rd, Register rn, const Operand& operand) {
1149 void And(Condition cond, Register rd, Register rn, const Operand& operand) {
1181 Condition cond,
1215 void Ands(Condition cond, Register rd, Register rn, const Operand& operand) {
1229 void Asr(Condition cond, Register rd, Register rm, const Operand& operand) {
1250 Condition cond,
1282 void Asrs(Condition cond, Register rd, Register rm, const Operand& operand) {
1296 void B(Condition cond, Label* label, BranchHint hint = kBranchWithoutHint) {
1318 void BPreferNear(Condition cond, Label* label) { B(cond, label, kNear); }
1321 void Bfc(Condition cond, Register rd, uint32_t lsb, uint32_t width) {
1334 Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width) {
1347 void Bic(Condition cond, Register rd, Register rn, const Operand& operand) {
1375 Condition cond,
1405 void Bics(Condition cond, Register rd, Register rn, const Operand& operand) {
1419 void Bkpt(Condition cond, uint32_t imm) {
1428 void Bl(Condition cond, Label* label) {
1448 void Blx(Condition cond, Label* label) {
1468 void Blx(Condition cond, Register rm) {
1481 void Bx(Condition cond, Register rm) {
1494 void Bxj(Condition cond, Register rm) {
1542 void Clrex(Condition cond) {
1551 void Clz(Condition cond, Register rd, Register rm) {
1562 void Cmn(Condition cond, Register rn, const Operand& operand) {
1577 void Cmp(Condition cond, Register rn, const Operand& operand) {
1595 void Crc32b(Condition cond, Register rd, Register rn, Register rm) {
1607 void Crc32cb(Condition cond, Register rd, Register rn, Register rm) {
1621 void Crc32ch(Condition cond, Register rd, Register rn, Register rm) {
1635 void Crc32cw(Condition cond, Register rd, Register rn, Register rm) {
1649 void Crc32h(Condition cond, Register rd, Register rn, Register rm) {
1661 void Crc32w(Condition cond, Register rd, Register rn, Register rm) {
1673 void Dmb(Condition cond, MemoryBarrier option) {
1682 void Dsb(Condition cond, MemoryBarrier option) {
1691 void Eor(Condition cond, Register rd, Register rn, const Operand& operand) {
1719 Condition cond,
1749 void Eors(Condition cond, Register rd, Register rn, const Operand& operand) {
1763 void Fldmdbx(Condition cond,
1779 void Fldmiax(Condition cond,
1795 void Fstmdbx(Condition cond,
1811 void Fstmiax(Condition cond,
1827 void Hlt(Condition cond, uint32_t imm) {
1836 void Hvc(Condition cond, uint32_t imm) {
1845 void Isb(Condition cond, MemoryBarrier option) {
1854 void Lda(Condition cond, Register rt, const MemOperand& operand) {
1865 void Ldab(Condition cond, Register rt, const MemOperand& operand) {
1876 void Ldaex(Condition cond, Register rt, const MemOperand& operand) {
1887 void Ldaexb(Condition cond, Register rt, const MemOperand& operand) {
1900 void Ldaexd(Condition cond,
1917 void Ldaexh(Condition cond, Register rt, const MemOperand& operand) {
1930 void Ldah(Condition cond, Register rt, const MemOperand& operand) {
1941 void Ldm(Condition cond,
1957 void Ldmda(Condition cond,
1973 void Ldmdb(Condition cond,
1989 void Ldmea(Condition cond,
2005 void Ldmed(Condition cond,
2021 void Ldmfa(Condition cond,
2037 void Ldmfd(Condition cond,
2053 void Ldmib(Condition cond,
2069 void Ldr(Condition cond, Register rt, const MemOperand& operand) {
2097 void Ldrb(Condition cond, Register rt, const MemOperand& operand) {
2120 void Ldrd(Condition cond,
2138 void Ldrex(Condition cond, Register rt, const MemOperand& operand) {
2149 void Ldrexb(Condition cond, Register rt, const MemOperand& operand) {
2162 void Ldrexd(Condition cond,
2179 void Ldrexh(Condition cond, Register rt, const MemOperand& operand) {
2192 void Ldrh(Condition cond, Register rt, const MemOperand& operand) {
2215 void Ldrsb(Condition cond, Register rt, const MemOperand& operand) {
2233 void Ldrsh(Condition cond, Register rt, const MemOperand& operand) {
2251 void Lsl(Condition cond, Register rd, Register rm, const Operand& operand) {
2272 Condition cond,
2304 void Lsls(Condition cond, Register rd, Register rm, const Operand& operand) {
2318 void Lsr(Condition cond, Register rd, Register rm, const Operand& operand) {
2339 Condition cond,
2371 void Lsrs(Condition cond, Register rd, Register rm, const Operand& operand) {
2385 void Mla(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2400 Condition cond,
2423 Condition cond, Register rd, Register rn, Register rm, Register ra) {
2438 void Mls(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2453 void Mov(Condition cond, Register rd, const Operand& operand) {
2488 Condition cond,
2530 void Movs(Condition cond, Register rd, const Operand& operand) {
2541 void Movt(Condition cond, Register rd, const Operand& operand) {
2552 void Mrs(Condition cond, Register rd, SpecialRegister spec_reg) {
2562 void Msr(Condition cond,
2576 void Mul(Condition cond, Register rd, Register rn, Register rm) {
2591 Condition
2617 void Muls(Condition cond, Register rd, Register rn, Register rm) {
2629 void Mvn(Condition cond, Register rd, const Operand& operand) {
2644 Condition cond,
2670 void Mvns(Condition cond, Register rd, const Operand& operand) {
2681 void Nop(Condition cond) {
2690 void Orn(Condition cond, Register rd, Register rn, const Operand& operand) {
2714 Condition cond,
2737 void Orns(Condition cond, Register rd, Register rn, const Operand& operand) {
2751 void Orr(Condition cond, Register rd, Register rn, const Operand& operand) {
2783 Condition cond,
2817 void Orrs(Condition cond, Register rd, Register rn, const Operand& operand) {
2831 void Pkhbt(Condition cond, Register rd, Register rn, const Operand& operand) {
2845 void Pkhtb(Condition cond, Register rd, Register rn, const Operand& operand) {
2860 void Pld(Condition cond, const MemOperand& operand) {
2870 void Pldw(Condition cond, const MemOperand& operand) {
2880 void Pli(Condition cond, const MemOperand& operand) {
2891 void Pop(Condition cond, RegisterList registers) {
2901 void Pop(Condition cond, Register rt) {
2911 void Push(Condition cond, RegisterList registers) {
2921 void Push(Condition cond, Register rt) {
2931 void Qadd(Condition cond, Register rd, Register rm, Register rn) {
2943 void Qadd16(Condition cond, Register rd, Register rn, Register rm) {
2955 void Qadd8(Condition cond, Register rd, Register rn, Register rm) {
2967 void Qasx(Condition cond, Register rd, Register rn, Register rm) {
2979 void Qdadd(Condition cond, Register rd, Register rm, Register rn) {
2991 void Qdsub(Condition cond, Register rd, Register rm, Register rn) {
3003 void Qsax(Condition cond, Register rd, Register rn, Register rm) {
3015 void Qsub(Condition cond, Register rd, Register rm, Register rn) {
3027 void Qsub16(Condition cond, Register rd, Register rn, Register rm) {
3039 void Qsub8(Condition cond, Register rd, Register rn, Register rm) {
3051 void Rbit(Condition cond, Register rd, Register rm) {
3062 void Rev(Condition cond, Register rd, Register rm) {
3073 void Rev16(Condition cond, Register rd, Register rm) {
3084 void Revsh(Condition cond, Register rd, Register rm) {
3095 void Ror(Condition cond, Register rd, Register rm, const Operand& operand) {
3113 Condition cond,
3143 void Rors(Condition cond, Register rd, Register rm, const Operand& operand) {
3157 void Rrx(Condition cond, Register rd, Register rm) {
3167 void Rrx(FlagsUpdate flags, Condition cond, Register rd, Register rm) {
3184 void Rrxs(Condition cond, Register rd, Register rm) {
3195 void Rsb(Condition cond, Register rd, Register rn, const Operand& operand) {
3213 Condition cond,
3243 void Rsbs(Condition cond, Register rd, Register rn, const Operand& operand) {
3257 void Rsc(Condition cond, Register rd, Register rn, const Operand& operand) {
3271 Condition cond,
3294 void Rscs(Condition cond, Register rd, Register rn, const Operand& operand) {
3308 void Sadd16(Condition cond, Register rd, Register rn, Register rm) {
3320 void Sadd8(Condition cond, Register rd, Register rn, Register rm) {
3332 void Sasx(Condition cond, Register rd, Register rn, Register rm) {
3344 void Sbc(Condition cond, Register rd, Register rn, const Operand& operand) {
3362 Condition cond,
3392 void Sbcs(Condition cond, Register rd, Register rn, const Operand& operand) {
3407 Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width) {
3420 void Sdiv(Condition cond, Register rd, Register rn, Register rm) {
3432 void Sel(Condition cond, Register rd, Register rn, Register rm) {
3444 void Shadd16(Condition cond, Register rd, Register rn, Register rm) {
3458 void Shadd8(Condition cond, Register rd, Register rn, Register rm) {
3470 void Shasx(Condition cond, Register rd, Register rn, Register rm) {
3482 void Shsax(Condition cond, Register rd, Register rn, Register rm) {
3494 void Shsub16(Condition cond, Register rd, Register rn, Register rm) {
3508 void Shsub8(Condition cond, Register rd, Register rn, Register rm) {
3521 Condition cond, Register rd, Register rn, Register rm, Register ra) {
3537 Condition cond, Register rd, Register rn, Register rm, Register ra) {
3553 Condition cond, Register rd, Register rn, Register rm, Register ra) {
3569 Condition cond, Register rd, Register rn, Register rm, Register ra) {
3585 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3601 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3617 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3633 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3649 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3665 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3681 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3697 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3713 Condition cond, Register rd, Register rn, Register rm, Register ra) {
3729 Condition cond, Register rd, Register rn, Register rm, Register ra) {
3745 Condition cond, Register rd, Register rn, Register rm, Register ra) {
3761 Condition cond, Register rd, Register rn, Register rm, Register ra) {
3777 Condition cond, Register rd, Register rn, Register rm, Register ra) {
3793 Condition cond, Register rd, Register rn, Register rm, Register ra) {
3809 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3825 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3841 Condition cond, Register rd, Register rn, Register rm, Register ra) {
3857 Condition cond, Register rd, Register rn, Register rm, Register ra) {
3873 Condition cond, Register rd, Register rn, Register rm, Register ra) {
3889 Condition cond, Register rd, Register rn, Register rm, Register ra) {
3904 void Smmul(Condition cond, Register rd, Register rn, Register rm) {
3916 void Smmulr(Condition
3928 void Smuad(Condition cond, Register rd, Register rn, Register rm) {
3940 void Smuadx(Condition cond, Register rd, Register rn, Register rm) {
3952 void Smulbb(Condition cond, Register rd, Register rn, Register rm) {
3964 void Smulbt(Condition cond, Register rd, Register rn, Register rm) {
3977 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3992 Condition cond,
4018 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4033 void Smultb(Condition cond, Register rd, Register rn, Register rm) {
4045 void Smultt(Condition cond, Register rd, Register rn, Register rm) {
4057 void Smulwb(Condition cond, Register rd, Register rn, Register rm) {
4069 void Smulwt(Condition cond, Register rd, Register rn, Register rm) {
4081 void Smusd(Condition cond, Register rd, Register rn, Register rm) {
4093 void Smusdx(Condition cond, Register rd, Register rn, Register rm) {
4105 void Ssat(Condition cond, Register rd, uint32_t imm, const Operand& operand) {
4118 void Ssat16(Condition cond, Register rd, uint32_t imm, Register rn) {
4131 void Ssax(Condition cond, Register rd, Register rn, Register rm) {
4143 void Ssub16(Condition cond, Register rd, Register rn, Register rm) {
4155 void Ssub8(Condition cond, Register rd, Register rn, Register rm) {
4167 void Stl(Condition cond, Register rt, const MemOperand& operand) {
4178 void Stlb(Condition cond, Register rt, const MemOperand& operand) {
4189 void Stlex(Condition cond,
4206 void Stlexb(Condition cond,
4223 void Stlexd(Condition cond,
4245 void Stlexh(Condition cond,
4262 void Stlh(Condition cond, Register rt, const MemOperand& operand) {
4273 void Stm(Condition cond,
4289 void Stmda(Condition cond,
4305 void Stmdb(Condition cond,
4321 void Stmea(Condition cond,
4337 void Stmed(Condition cond,
4353 void Stmfa(Condition cond,
4369 void Stmfd(Condition cond,
4385 void Stmib(Condition cond,
4401 void Str(Condition cond, Register rt, const MemOperand& operand) {
4428 void Strb(Condition cond, Register rt, const MemOperand& operand) {
4450 void Strd(Condition cond,
4467 void Strex(Condition cond,
4484 void Strexb(Condition cond,
4501 void Strexd(Condition cond,
4523 void Strexh(Condition cond,
4540 void Strh(Condition cond, Register rt, const MemOperand& operand) {
4562 void Sub(Condition cond, Register rd, Register rn, const Operand& operand) {
4592 Condition cond,
4636 void Subs(Condition cond, Register rd, Register rn, const Operand& operand) {
4650 void Svc(Condition cond, uint32_t imm) {
4659 void Sxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
4673 void Sxtab16(Condition cond,
4690 void Sxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
4704 void Sxtb(Condition cond, Register rd, const Operand& operand) {
4715 void Sxtb16(Condition cond, Register rd, const Operand& operand) {
4726 void Sxth(Condition cond, Register rd, const Operand& operand) {
4737 void Teq(Condition cond, Register rn, const Operand& operand) {
4748 void Tst(Condition cond, Register rn, const Operand& operand) {
4763 void Uadd16(Condition
4775 void Uadd8(Condition cond, Register rd, Register rn, Register rm) {
4787 void Uasx(Condition cond, Register rd, Register rn, Register rm) {
4800 Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width) {
4813 void Udf(Condition cond, uint32_t imm) {
4822 void Udiv(Condition cond, Register rd, Register rn, Register rm) {
4834 void Uhadd16(Condition cond, Register rd, Register rn, Register rm) {
4848 void Uhadd8(Condition cond, Register rd, Register rn, Register rm) {
4860 void Uhasx(Condition cond, Register rd, Register rn, Register rm) {
4872 void Uhsax(Condition cond, Register rd, Register rn, Register rm) {
4884 void Uhsub16(Condition cond, Register rd, Register rn, Register rm) {
4898 void Uhsub8(Condition cond, Register rd, Register rn, Register rm) {
4911 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4927 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4942 Condition cond,
4968 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4984 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4999 Condition cond,
5025 Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5040 void Uqadd16(Condition cond, Register rd, Register rn, Register rm) {
5054 void Uqadd8(Condition cond, Register rd, Register rn, Register rm) {
5066 void Uqasx(Condition cond, Register rd, Register rn, Register rm) {
5078 void Uqsax(Condition cond, Register rd, Register rn, Register rm) {
5090 void Uqsub16(Condition cond, Register rd, Register rn, Register rm) {
5104 void Uqsub8(Condition cond, Register rd, Register rn, Register rm) {
5116 void Usad8(Condition cond, Register rd, Register rn, Register rm) {
5129 Condition cond, Register rd, Register rn, Register rm, Register ra) {
5144 void Usat(Condition cond, Register rd, uint32_t imm, const Operand& operand) {
5157 void Usat16(Condition cond, Register rd, uint32_t imm, Register rn) {
5170 void Usax(Condition cond, Register rd, Register rn, Register rm) {
5182 void Usub16(Condition cond, Register rd, Register rn, Register rm) {
5194 void Usub8(Condition cond, Register rd, Register rn, Register rm) {
5206 void Uxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
5220 void Uxtab16(Condition cond,
5237 void Uxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
5251 void Uxtb(Condition cond, Register rd, const Operand& operand) {
5262 void Uxtb16(Condition cond, Register rd, const Operand& operand) {
5273 void Uxth(Condition cond, Register rd, const Operand& operand) {
5285 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5300 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5315 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5330 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5345 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5360 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5374 void Vabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
5385 void Vabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
5396 void Vabs(Condition cond, DataType dt, SRegister rd, SRegister rm) {
5408 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5423 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5438 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5453 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5468 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5483 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5498 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5513 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5528 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5543 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5558 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
5573 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5588 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5603 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
5617 void Vand(Condition cond,
5635 void Vand(Condition cond,
5653 void Vbic(Condition cond,
5671 void Vbic(Condition cond,
5690 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5703 void Vbif(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5711 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5724 void Vbif(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5732 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5745 void Vbit(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5753 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5766 void Vbit(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5774 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5787 void Vbsl(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5795 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5808 void Vbsl(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5815 void Vceq(Condition cond,
5833 void Vceq(Condition cond,
5852 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5867 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5881 void Vcge(Condition cond,
5899 void Vcge(Condition cond,
5918 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5933 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5947 void Vcgt(Condition cond,
5965 void Vcgt(Condition cond,
5984 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5999 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6013 void Vcle(Condition cond,
6031 void Vcle(Condition cond,
6050 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6065 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6079 void Vcls(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6090 void Vcls(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6101 void Vclt(Condition cond,
6119 void Vclt(Condition cond,
6138 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6153 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6167 void Vclz(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6178 void Vclz(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6189 void Vcmp(Condition cond,
6205 void Vcmp(Condition cond,
6221 void Vcmpe(Condition cond,
6237 void Vcmpe(Condition cond,
6253 void Vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6264 void Vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6276 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6290 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6303 void Vcvt(Condition cond,
6322 void Vcvt(Condition cond,
6341 void Vcvt(Condition cond,
6361 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6375 Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6389 Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
6403 Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
6417 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6467 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6481 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6495 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6617 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6631 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6645 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6659 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6673 Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6687 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6702 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6716 void Vdup(Condition cond, DataType dt, QRegister rd, Register rt) {
6727 void Vdup(Condition cond, DataType dt, DRegister rd, Register rt) {
6738 void Vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm) {
6751 void Vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm) {
6765 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6778 void Veor(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
6786 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6799 void Veor(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
6806 void Vext(Condition cond,
6830 void Vext(Condition cond,
6855 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6870 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6885 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6900 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6915 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6930 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6945 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6960 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6975 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6990 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7005 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7020 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7035 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7050 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7064 void Vld1(Condition cond,
7082 void Vld2(Condition cond,
7100 void Vld3(Condition cond,
7118 void Vld3(Condition cond,
7136 void Vld4(Condition cond,
7154 void Vldm(Condition cond,
7173 void Vldm(Condition cond,
7183 void Vldm(Condition cond,
7202 void Vldm(Condition cond,
7212 void Vldmdb(Condition cond,
7231 void Vldmdb(Condition cond,
7241 void Vldmdb(Condition cond,
7260 void Vldmdb(Condition cond,
7270 void Vldmia(Condition cond,
7289 void Vldmia(Condition cond,
7299 void Vldmia(Condition cond,
7318 void Vldmia(Condition cond,
7329 void Vldr(Condition cond,
7344 void Vldr(Condition cond, DRegister rd, const MemOperand& operand) {
7352 void Vldr(Condition cond,
7367 void Vldr(Condition cond, SRegister rd, const MemOperand& operand) {
7375 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7390 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7435 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7450 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7494 void Vmla(Condition cond,
7512 void Vmla(Condition cond,
7531 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7546 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7561 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7575 void Vmlal(Condition cond,
7594 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7608 void Vmls(Condition cond,
7626 void Vmls(Condition cond,
7645 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7660 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7675 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7689 void Vmlsl(Condition cond,
7708 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7722 void Vmov(Condition cond, Register rt, SRegister rn) {
7733 void Vmov(Condition cond, SRegister rn, Register rt) {
7744 void Vmov(Condition cond, Register rt, Register rt2, DRegister rm) {
7756 void Vmov(Condition cond, DRegister rm, Register rt, Register rt2) {
7769 Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) {
7785 Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) {
7800 void Vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt) {
7812 void Vmov(Condition cond, DRegisterLane rd, Register rt) {
7819 void Vmov(Condition cond,
7835 void Vmov(Condition cond,
7851 void Vmov(Condition cond,
7867 void Vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn) {
7879 void Vmov(Condition cond, Register rt, DRegisterLane rn) {
7886 void Vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm) {
7897 void Vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
7908 void Vmrs(Condition cond,
7922 void Vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt) {
7932 void Vmul(Condition cond,
7952 void Vmul(Condition cond,
7973 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7988 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8003 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8017 void Vmull(Condition cond,
8038 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8052 void Vmvn(Condition cond,
8068 void Vmvn(Condition cond,
8084 void Vneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8095 void Vneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8106 void Vneg(Condition cond, DataType dt, SRegister rd, SRegister rm) {
8118 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8133 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8148 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8163 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8178 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8193 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8207 void Vorn(Condition cond,
8225 void Vorn(Condition cond,
8243 void Vorr(Condition cond,
8260 void Vorr(Condition cond,
8270 void Vorr(Condition cond,
8287 void Vorr(Condition cond,
8297 void Vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8310 void Vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8324 Condition
8338 void Vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8351 void Vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8365 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8380 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8394 void Vpop(Condition cond, DataType dt, DRegisterList dreglist) {
8403 void Vpop(Condition cond, DRegisterList dreglist) {
8408 void Vpop(Condition cond, DataType dt, SRegisterList sreglist) {
8417 void Vpop(Condition cond, SRegisterList sreglist) {
8422 void Vpush(Condition cond, DataType dt, DRegisterList dreglist) {
8431 void Vpush(Condition cond, DRegisterList dreglist) {
8438 void Vpush(Condition cond, DataType dt, SRegisterList sreglist) {
8447 void Vpush(Condition cond, SRegisterList sreglist) {
8454 void Vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8465 void Vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8477 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8492 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8507 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8521 void Vqdmlal(Condition cond,
8542 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8556 void Vqdmlsl(Condition cond,
8577 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8592 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8606 void Vqdmulh(Condition cond,
8624 void Vqdmulh(Condition cond,
8643 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8657 void Vqdmull(Condition cond,
8675 void Vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8688 void Vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8701 void Vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8712 void Vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8724 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8739 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8753 void Vqrdmulh(Condition cond,
8771 void Vqrdmulh(Condition cond,
8790 Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
8805 Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
8819 void Vqrshrn(Condition cond,
8840 void Vqrshrun(Condition cond,
8861 void Vqshl(Condition cond,
8879 void Vqshl(Condition cond,
8897 void Vqshlu(Condition cond,
8918 void Vqshlu(Condition cond,
8939 void Vqshrn(Condition cond,
8960 void Vqshrun(Condition cond,
8982 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8997 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9012 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9026 void Vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9039 void Vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9053 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9068 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9082 void Vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9095 void Vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9108 void Vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9121 void Vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9134 void Vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9147 void Vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9161 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9176 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9299 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9313 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9327 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9350 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9364 Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
9387 Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
9401 Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
9416 Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
9430 void Vrshr(Condition cond,
9448 void Vrshr(Condition cond,
9466 void Vrshrn(Condition cond,
9487 void Vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9500 void Vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9514 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9529 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9543 void Vrsra(Condition cond,
9561 void Vrsra(Condition cond,
9580 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9674 void Vshl(Condition cond,
9692 void Vshl(Condition cond,
9710 void Vshll(Condition cond,
9728 void Vshr(Condition cond,
9746 void Vshr(Condition cond,
9764 void Vshrn(Condition cond,
9782 void Vsli(Condition cond,
9800 void Vsli(Condition cond,
9818 void Vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm) {
9829 void Vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9840 void Vsra(Condition cond,
9858 void Vsra(Condition cond,
9876 void Vsri(Condition cond,
9894 void Vsri(Condition cond,
9912 void Vst1(Condition cond,
9930 void Vst2(Condition cond,
9948 void Vst3(Condition cond,
9966 void Vst3(Condition cond,
9984 void Vst4(Condition cond,
10002 void Vstm(Condition cond,
10021 void Vstm(Condition cond,
10031 void Vstm(Condition cond,
10050 void Vstm(Condition cond,
10060 void Vstmdb(Condition cond,
10079 void Vstmdb(Condition cond,
10089 void Vstmdb(Condition cond,
10108 void Vstmdb(Condition cond,
10118 Condition cond,
10137 void Vstmia(Condition cond,
10147 void Vstmia(Condition cond,
10166 void Vstmia(Condition cond,
10176 void Vstr(Condition cond,
10191 void Vstr(Condition cond, DRegister rd, const MemOperand& operand) {
10198 void Vstr(Condition cond,
10213 void Vstr(Condition cond, SRegister rd, const MemOperand& operand) {
10221 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10236 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10251 Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
10266 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
10281 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10296 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
10310 void Vswp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10320 void Vswp(Condition cond, DRegister rd, DRegister rm) {
10327 void Vswp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10337 void Vswp(Condition cond, QRegister rd, QRegister rm) {
10344 void Vtbl(Condition cond,
10365 void Vtbx(Condition cond,
10386 void Vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10397 void Vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10409 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10424 Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10438 void Vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10449 void Vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10460 void Vzip(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10471 void Vzip(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10482 void Yield(Condition cond) {
10490 void Vabs(Condition cond, VRegister rd, VRegister rm) {
10500 void Vadd(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10511 void Vcmp(Condition cond, VRegister rd, VRegister rm) {
10521 void Vcmpe(Condition cond, VRegister rd, VRegister rm) {
10531 void Vdiv(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10542 void Vfma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10553 void Vfms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10564 void Vfnma(Condition
10577 void Vfnms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10610 void Vmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10621 void Vmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10632 void Vmov(Condition cond, VRegister rd, VRegister rm) {
10642 void Vmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10653 void Vneg(Condition cond, VRegister rd, VRegister rm) {
10663 void Vnmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10676 void Vnmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10689 void Vnmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10742 void Vsqrt(Condition cond, VRegister rd, VRegister rm) {
10752 void Vsub(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10776 bool NeedBranch(Condition* cond) { return !cond->Is(al) && IsUsingT32(); }
