Home | History | Annotate | Download | only in aarch32

Lines Matching full:ldrd

617   void Ldrd(Condition cond, Register rt, Register rt2, RawLiteral* literal) {
634 ldrd(cond, rt, rt2, literal);
637 void Ldrd(Register rt, Register rt2, RawLiteral* literal) {
638 Ldrd(al, rt, rt2, literal);
776 // Generic Ldrd(rt, rt2, data)
777 void Ldrd(Condition cond, Register rt, Register rt2, uint64_t v) {
784 Ldrd(cond, rt, rt2, literal);
787 void Ldrd(Register rt, Register rt2, T v) {
788 Ldrd(al, rt, rt2, v);
936 // LDAEXD, LDRD, LDREXD, STLEX, STLEXB, STLEXH, STRD, STREX, STREXB, STREXH
2120 void Ldrd(Condition cond,
2131 ldrd(cond, rt, rt2, operand);
2133 void Ldrd(Register rt, Register rt2, const MemOperand& operand) {
2134 Ldrd(al, rt, rt2, operand);