Lines Matching refs:reg_size
768 unsigned reg_size = rd.GetSizeInBits();
769 VIXL_ASSERT(shift < reg_size);
770 ubfm(rd, rn, (reg_size - shift) % reg_size, reg_size - shift - 1);
2705 static Instr ImmS(unsigned imms, unsigned reg_size) {
2706 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(imms)) ||
2707 ((reg_size == kWRegSize) && IsUint5(imms)));
2708 USE(reg_size);
2712 static Instr ImmR(unsigned immr, unsigned reg_size) {
2713 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(immr)) ||
2714 ((reg_size == kWRegSize) && IsUint5(immr)));
2715 USE(reg_size);
2720 static Instr ImmSetBits(unsigned imms, unsigned reg_size) {
2721 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize));
2723 VIXL_ASSERT((reg_size == kXRegSize) || IsUint6(imms + 3));
2724 USE(reg_size);
2728 static Instr ImmRotate(unsigned immr, unsigned reg_size) {
2729 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize));
2730 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(immr)) ||
2731 ((reg_size == kWRegSize) && IsUint5(immr)));
2732 USE(reg_size);
2741 static Instr BitN(unsigned bitn, unsigned reg_size) {
2742 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize));
2743 VIXL_ASSERT((reg_size == kXRegSize) || (bitn == 0));
2744 USE(reg_size);
2888 static bool IsImmMovn(uint64_t imm, unsigned reg_size);
2889 static bool IsImmMovz(uint64_t imm, unsigned reg_size);
