Lines Matching refs:RTYPE
48 #define LD_B(RTYPE, psrc) *((RTYPE*)(psrc))
52 #define LD_H(RTYPE, psrc) *((RTYPE*)(psrc))
56 #define LD_W(RTYPE, psrc) *((RTYPE*)(psrc))
60 #define ST_B(RTYPE, in, pdst) *((RTYPE*)(pdst)) = in
64 #define ST_H(RTYPE, in, pdst) *((RTYPE*)(pdst)) = in
68 #define ST_W(RTYPE, in, pdst) *((RTYPE*)(pdst)) = in
216 * Return Type - as per RTYPE
220 #define LD_B2(RTYPE, psrc, stride, out0, out1) do { \
221 out0 = LD_B(RTYPE, psrc); \
222 out1 = LD_B(RTYPE, psrc + stride); \
227 #define LD_B3(RTYPE, psrc, stride, out0, out1, out2) do { \
228 LD_B2(RTYPE, psrc, stride, out0, out1); \
229 out2 = LD_B(RTYPE, psrc + 2 * stride); \
234 #define LD_B4(RTYPE, psrc, stride, out0, out1, out2, out3) do { \
235 LD_B2(RTYPE, psrc, stride, out0, out1); \
236 LD_B2(RTYPE, psrc + 2 * stride , stride, out2, out3); \
241 #define LD_B8(RTYPE, psrc, stride, \
243 LD_B4(RTYPE, psrc, stride, out0, out1, out2, out3); \
244 LD_B4(RTYPE, psrc + 4 * stride, stride, out4, out5, out6, out7); \
255 #define LD_H2(RTYPE, psrc, stride, out0, out1) do { \
256 out0 = LD_H(RTYPE, psrc); \
257 out1 = LD_H(RTYPE, psrc + stride); \
270 #define LD_W2(RTYPE, psrc, stride, out0, out1) do { \
271 out0 = LD_W(RTYPE, psrc); \
272 out1 = LD_W(RTYPE, psrc + stride); \
277 #define LD_W3(RTYPE, psrc, stride, out0, out1, out2) do { \
278 LD_W2(RTYPE, psrc, stride, out0, out1); \
279 out2 = LD_W(RTYPE, psrc + 2 * stride); \
284 #define LD_W4(RTYPE, psrc, stride, out0, out1, out2, out3) do { \
285 LD_W2(RTYPE, psrc, stride, out0, out1); \
286 LD_W2(RTYPE, psrc + 2 * stride, stride, out2, out3); \
296 #define ST_B2(RTYPE, in0, in1, pdst, stride) do { \
297 ST_B(RTYPE, in0, pdst); \
298 ST_B(RTYPE, in1, pdst + stride); \
303 #define ST_B4(RTYPE, in0, in1, in2, in3, pdst, stride) do { \
304 ST_B2(RTYPE, in0, in1, pdst, stride); \
305 ST_B2(RTYPE, in2, in3, pdst + 2 * stride, stride); \
310 #define ST_B8(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, \
312 ST_B4(RTYPE, in0, in1, in2, in3, pdst, stride); \
313 ST_B4(RTYPE, in4, in5, in6, in7, pdst + 4 * stride, stride); \
324 #define ST_W2(RTYPE, in0, in1, pdst, stride) do { \
325 ST_W(RTYPE, in0, pdst); \
326 ST_W(RTYPE, in1, pdst + stride); \
331 #define ST_W3(RTYPE, in0, in1, in2, pdst, stride) do { \
332 ST_W2(RTYPE, in0, in1, pdst, stride); \
333 ST_W(RTYPE, in2, pdst + 2 * stride); \
338 #define ST_W4(RTYPE, in0, in1, in2, in3, pdst, stride) do { \
339 ST_W2(RTYPE, in0, in1, pdst, stride); \
340 ST_W2(RTYPE, in2, in3, pdst + 2 * stride, stride); \
350 #define ST_H2(RTYPE, in0, in1, pdst, stride) do { \
351 ST_H(RTYPE, in0, pdst); \
352 ST_H(RTYPE, in1, pdst + stride); \
412 * Return Type - as per RTYPE
416 #define SLDI_B(RTYPE, in0, in1, slide_val) \
417 (RTYPE)__msa_sldi_b((v16i8)in0, (v16i8)in1, slide_val) \
426 * Return Type - as per RTYPE
430 #define VSHF_B(RTYPE, in0, in1, mask) \
431 (RTYPE)__msa_vshf_b((v16i8)mask, (v16i8)in1, (v16i8)in0)
438 #define VSHF_B2(RTYPE, in0, in1, in2, in3, mask0, mask1, out0, out1) do { \
439 out0 = VSHF_B(RTYPE, in0, in1, mask0); \
440 out1 = VSHF_B(RTYPE, in2, in3, mask1); \
450 * Return Type - as per RTYPE
454 #define VSHF_H2(RTYPE, in0, in1, in2, in3, mask0, mask1, out0, out1) do { \
455 out0 = (RTYPE)__msa_vshf_h((v8i16)mask0, (v8i16)in1, (v8i16)in0); \
456 out1 = (RTYPE)__msa_vshf_h((v8i16)mask1, (v8i16)in3, (v8i16)in2); \
464 * Return Type - as per RTYPE
471 #define DOTP_SB2(RTYPE, mult0, mult1, cnst0, cnst1, out0, out1) do { \
472 out0 = (RTYPE)__msa_dotp_s_h((v16i8)mult0, (v16i8)cnst0); \
473 out1 = (RTYPE)__msa_dotp_s_h((v16i8)mult1, (v16i8)cnst1); \
480 * Return Type - as per RTYPE
487 #define DOTP_SH2(RTYPE, mult0, mult1, cnst0, cnst1, out0, out1) do { \
488 out0 = (RTYPE)__msa_dotp_s_w((v8i16)mult0, (v8i16)cnst0); \
489 out1 = (RTYPE)__msa_dotp_s_w((v8i16)mult1, (v8i16)cnst1); \
496 * Return Type - as per RTYPE
503 #define DOTP_UW2(RTYPE, mult0, mult1, cnst0, cnst1, out0, out1) do { \
504 out0 = (RTYPE)__msa_dotp_u_d((v4u32)mult0, (v4u32)cnst0); \
505 out1 = (RTYPE)__msa_dotp_u_d((v4u32)mult1, (v4u32)cnst1); \
512 * Return Type - as per RTYPE
519 #define DPADD_SH2(RTYPE, mult0, mult1, cnst0, cnst1, out0, out1) do { \
520 out0 = (RTYPE)__msa_dpadd_s_w((v4i32)out0, (v8i16)mult0, (v8i16)cnst0); \
521 out1 = (RTYPE)__msa_dpadd_s_w((v4i32)out1, (v8i16)mult1, (v8i16)cnst1); \
635 Return Type - as per RTYPE
640 #define HADD_SH2(RTYPE, in0, in1, out0, out1) do { \
641 out0 = (RTYPE)__msa_hadd_s_w((v8i16)in0, (v8i16)in0); \
642 out1 = (RTYPE)__msa_hadd_s_w((v8i16)in1, (v8i16)in1); \
646 #define HADD_SH4(RTYPE, in0, in1, in2, in3, out0, out1, out2, out3) do { \
647 HADD_SH2(RTYPE, in0, in1, out0, out1); \
648 HADD_SH2(RTYPE, in2, in3, out2, out3); \
655 * Return Type - as per RTYPE
660 #define HSUB_UB2(RTYPE, in0, in1, out0, out1) do { \
661 out0 = (RTYPE)__msa_hsub_u_h((v16u8)in0, (v16u8)in0); \
662 out1 = (RTYPE)__msa_hsub_u_h((v16u8)in1, (v16u8)in1); \
671 * Return Type - as per RTYPE
674 #define INSERT_W2(RTYPE, in0, in1, out) do { \
675 out = (RTYPE)__msa_insert_w((v4i32)out, 0, in0); \
676 out = (RTYPE)__msa_insert_w((v4i32)out, 1, in1); \
681 #define INSERT_W4(RTYPE, in0, in1, in2, in3, out) do { \
682 out = (RTYPE)__msa_insert_w((v4i32)out, 0, in0); \
683 out = (RTYPE)__msa_insert_w((v4i32)out, 1, in1); \
684 out = (RTYPE)__msa_insert_w((v4i32)out, 2, in2); \
685 out = (RTYPE)__msa_insert_w((v4i32)out, 3, in3); \
694 * Return Type - as per RTYPE
698 #define INSERT_D2(RTYPE, in0, in1, out) do { \
699 out = (RTYPE)__msa_insert_d((v2i64)out, 0, in0); \
700 out = (RTYPE)__msa_insert_d((v2i64)out, 1, in1); \
708 * Return Type - as per RTYPE
712 #define ILVEV_B2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
713 out0 = (RTYPE)__msa_ilvev_b((v16i8)in1, (v16i8)in0); \
714 out1 = (RTYPE)__msa_ilvev_b((v16i8)in3, (v16i8)in2); \
725 * Return Type - as per RTYPE
729 #define ILVOD_B2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
730 out0 = (RTYPE)__msa_ilvod_b((v16i8)in1, (v16i8)in0); \
731 out1 = (RTYPE)__msa_ilvod_b((v16i8)in3, (v16i8)in2); \
742 * Return Type - as per RTYPE
746 #define ILVEV_H2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
747 out0 = (RTYPE)__msa_ilvev_h((v8i16)in1, (v8i16)in0); \
748 out1 = (RTYPE)__msa_ilvev_h((v8i16)in3, (v8i16)in2); \
758 * Return Type - as per RTYPE
762 #define ILVOD_H2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
763 out0 = (RTYPE)__msa_ilvod_h((v8i16)in1, (v8i16)in0); \
764 out1 = (RTYPE)__msa_ilvod_h((v8i16)in3, (v8i16)in2); \
774 * Return Type - as per RTYPE
778 #define ILVEV_W2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
779 out0 = (RTYPE)__msa_ilvev_w((v4i32)in1, (v4i32)in0); \
780 out1 = (RTYPE)__msa_ilvev_w((v4i32)in3, (v4i32)in2); \
790 * Return Type - as per RTYPE
796 #define ILVEVOD_W2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
797 out0 = (RTYPE)__msa_ilvev_w((v4i32)in1, (v4i32)in0); \
798 out1 = (RTYPE)__msa_ilvod_w((v4i32)in3, (v4i32)in2); \
808 * Return Type - as per RTYPE
814 #define ILVEVOD_H2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
815 out0 = (RTYPE)__msa_ilvev_h((v8i16)in1, (v8i16)in0); \
816 out1 = (RTYPE)__msa_ilvod_h((v8i16)in3, (v8i16)in2); \
826 * Return Type - as per RTYPE
830 #define ILVEV_D2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
831 out0 = (RTYPE)__msa_ilvev_d((v2i64)in1, (v2i64)in0); \
832 out1 = (RTYPE)__msa_ilvev_d((v2i64)in3, (v2i64)in2); \
842 * Return Type - as per RTYPE
846 #define ILVL_B2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
847 out0 = (RTYPE)__msa_ilvl_b((v16i8)in0, (v16i8)in1); \
848 out1 = (RTYPE)__msa_ilvl_b((v16i8)in2, (v16i8)in3); \
859 * Return Type - as per RTYPE
863 #define ILVR_B2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
864 out0 = (RTYPE)__msa_ilvr_b((v16i8)in0, (v16i8)in1); \
865 out1 = (RTYPE)__msa_ilvr_b((v16i8)in2, (v16i8)in3); \
873 #define ILVR_B4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, \
875 ILVR_B2(RTYPE, in0, in1, in2, in3, out0, out1); \
876 ILVR_B2(RTYPE, in4, in5, in6, in7, out2, out3); \
887 * Return Type - as per RTYPE
891 #define ILVR_H2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
892 out0 = (RTYPE)__msa_ilvr_h((v8i16)in0, (v8i16)in1); \
893 out1 = (RTYPE)__msa_ilvr_h((v8i16)in2, (v8i16)in3); \
899 #define ILVR_H4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, \
901 ILVR_H2(RTYPE, in0, in1, in2, in3, out0, out1); \
902 ILVR_H2(RTYPE, in4, in5, in6, in7, out2, out3); \
911 * Return Type - as per RTYPE
915 #define ILVR_D2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
916 out0 = (RTYPE)__msa_ilvr_d((v2i64)in0, (v2i64)in1); \
917 out1 = (RTYPE)__msa_ilvr_d((v2i64)in2, (v2i64)in3); \
923 #define ILVR_D4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, \
925 ILVR_D2(RTYPE, in0, in1, in2, in3, out0, out1); \
926 ILVR_D2(RTYPE, in4, in5, in6, in7, out2, out3); \
934 * Return Type - as per RTYPE
938 #define ILVRL_B2(RTYPE, in0, in1, out0, out1) do { \
939 out0 = (RTYPE)__msa_ilvr_b((v16i8)in0, (v16i8)in1); \
940 out1 = (RTYPE)__msa_ilvl_b((v16i8)in0, (v16i8)in1); \
948 #define ILVRL_H2(RTYPE, in0, in1, out0, out1) do { \
949 out0 = (RTYPE)__msa_ilvr_h((v8i16)in0, (v8i16)in1); \
950 out1 = (RTYPE)__msa_ilvl_h((v8i16)in0, (v8i16)in1); \
958 #define ILVRL_W2(RTYPE, in0, in1, out0, out1) do { \
959 out0 = (RTYPE)__msa_ilvr_w((v4i32)in0, (v4i32)in1); \
960 out1 = (RTYPE)__msa_ilvl_w((v4i32)in0, (v4i32)in1); \
970 * Return Type - as per RTYPE
975 #define PCKEV_B2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
976 out0 = (RTYPE)__msa_pckev_b((v16i8)in0, (v16i8)in1); \
977 out1 = (RTYPE)__msa_pckev_b((v16i8)in2, (v16i8)in3); \
984 #define PCKEV_B4(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, \
986 PCKEV_B2(RTYPE, in0, in1, in2, in3, out0, out1); \
987 PCKEV_B2(RTYPE, in4, in5, in6, in7, out2, out3); \
997 * Return Type - as per RTYPE
1002 #define PCKEV_H2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
1003 out0 = (RTYPE)__msa_pckev_h((v8i16)in0, (v8i16)in1); \
1004 out1 = (RTYPE)__msa_pckev_h((v8i16)in2, (v8i16)in3); \
1014 * Return Type - as per RTYPE
1019 #define PCKEV_W2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
1020 out0 = (RTYPE)__msa_pckev_w((v4i32)in0, (v4i32)in1); \
1021 out1 = (RTYPE)__msa_pckev_w((v4i32)in2, (v4i32)in3); \
1031 * Return Type - as per RTYPE
1036 #define PCKOD_H2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
1037 out0 = (RTYPE)__msa_pckod_h((v8i16)in0, (v8i16)in1); \
1038 out1 = (RTYPE)__msa_pckod_h((v8i16)in2, (v8i16)in3); \
1048 * Return Type - as per input vector RTYPE
1052 #define SRAI_W2(RTYPE, in0, in1, shift_val) do { \
1053 in0 = (RTYPE)SRAI_W(in0, shift_val); \
1054 in1 = (RTYPE)SRAI_W(in1, shift_val); \
1059 #define SRAI_W4(RTYPE, in0, in1, in2, in3, shift_val) do { \
1060 SRAI_W2(RTYPE, in0, in1, shift_val); \
1061 SRAI_W2(RTYPE, in2, in3, shift_val); \
1069 * Return Type - as per input vector RTYPE
1073 #define SRAI_H2(RTYPE, in0, in1, shift_val) do { \
1074 in0 = (RTYPE)SRAI_H(in0, shift_val); \
1075 in1 = (RTYPE)SRAI_H(in1, shift_val); \
1083 * Return Type - as per input vector RTYPE
1087 #define SRARI_W2(RTYPE, in0, in1, shift) do { \
1088 in0 = (RTYPE)__msa_srari_w((v4i32)in0, shift); \
1089 RTYPE)__msa_srari_w((v4i32)in1, shift); \
1093 #define SRARI_W4(RTYPE, in0, in1, in2, in3, shift) do { \
1094 SRARI_W2(RTYPE, in0, in1, shift); \
1095 SRARI_W2(RTYPE, in2, in3, shift); \
1104 * Return Type - as per RTYPE
1111 #define SRAR_D2(RTYPE, in0, in1, shift) do { \
1112 in0 = (RTYPE)__msa_srar_d((v2i64)in0, (v2i64)shift); \
1113 in1 = (RTYPE)__msa_srar_d((v2i64)in1, (v2i64)shift); \
1119 #define SRAR_D4(RTYPE, in0, in1, in2, in3, shift) do { \
1120 SRAR_D2(RTYPE, in0, in1, shift); \
1121 SRAR_D2(RTYPE, in2, in3, shift); \
1132 #define ADDVI_H2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
1133 out0 = (RTYPE)ADDVI_H(in0, in1); \
1134 out1 = (RTYPE)ADDVI_H(in2, in3); \
1145 #define ADDVI_W2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
1146 out0 = (RTYPE)ADDVI_W(in0, in1); \
1147 out1 = (RTYPE)ADDVI_W(in2, in3); \
1157 #define FILL_W2(RTYPE, in0, in1, out0, out1) do { \
1158 out0 = (RTYPE)__msa_fill_w(in0); \
1159 out1 = (RTYPE)__msa_fill_w(in1); \
1331 * Return Type - as per RTYPE
1333 #define TRANSPOSE4x4_W(RTYPE, in0, in1, in2, in3, \
1338 out0 = (RTYPE)__msa_ilvr_d((v2i64)s2_m, (v2i64)s0_m); \
1339 out1 = (RTYPE)__msa_ilvl_d((v2i64)s2_m, (v2i64)s0_m); \
1340 out2 = (RTYPE)__msa_ilvr_d((v2i64)s3_m, (v2i64)s1_m); \
1341 out3 = (RTYPE)__msa_ilvl_d((v2i64)s3_m, (v2i64)s1_m); \
1381 * Return Type - as per RTYPE
1386 #define AVER_UB2(RTYPE, in0, in1, in2, in3, out0, out1) do { \
1387 out0 = (RTYPE)__msa_aver_u_b((v16u8)in0, (v16u8)in1); \
1388 out1 = (RTYPE)__msa_aver_u_b((v16u8)in2, (v16u8)in3); \
