Lines Matching refs:v4i32
27 #define ADDVI_W(a, b) __msa_addvi_w((v4i32)a, b)
30 #define SRAI_W(a, b) __msa_srai_w((v4i32)a, b)
32 #define SLLI_B(a, b) __msa_slli_b((v4i32)a, b)
58 #define LD_SW(...) LD_W(v4i32, __VA_ARGS__)
70 #define ST_SW(...) ST_W(v4i32, __VA_ARGS__)
275 #define LD_SW2(...) LD_W2(v4i32, __VA_ARGS__)
282 #define LD_SW3(...) LD_W3(v4i32, __VA_ARGS__)
289 #define LD_SW4(...) LD_W4(v4i32, __VA_ARGS__)
329 #define ST_SW2(...) ST_W2(v4i32, __VA_ARGS__)
336 #define ST_SW3(...) ST_W3(v4i32, __VA_ARGS__)
343 #define ST_SW4(...) ST_W4(v4i32, __VA_ARGS__)
396 const uint32_t out0_m = __msa_copy_s_w((v4i32)in0, idx0); \
397 const uint32_t out1_m = __msa_copy_s_w((v4i32)in0, idx1); \
398 const uint32_t out2_m = __msa_copy_s_w((v4i32)in1, idx2); \
399 const uint32_t out3_m = __msa_copy_s_w((v4i32)in1, idx3); \
491 #define DOTP_SH2_SW(...) DOTP_SH2(v4i32, __VA_ARGS__)
520 out0 = (RTYPE)__msa_dpadd_s_w((v4i32)out0, (v8i16)mult0, (v8i16)cnst0); \
521 out1 = (RTYPE)__msa_dpadd_s_w((v4i32)out1, (v8i16)mult1, (v8i16)cnst1); \
523 #define DPADD_SH2_SW(...) DPADD_SH2(v4i32, __VA_ARGS__)
569 const v4i32 max_m = __msa_ldi_w(255); \
570 val = __msa_maxi_s_w((v4i32)val, 0); \
571 val = __msa_min_s_w(max_m, (v4i32)val); \
588 static WEBP_INLINE int32_t func_hadd_sw_s32(v4i32 in) {
589 const v2i64 res0_m = __msa_hadd_s_d((v4i32)in, (v4i32)in);
592 int32_t sum_m = __msa_copy_s_w((v4i32)out, 0);
605 const v4i32 res = __msa_hadd_s_w(in, in);
609 const int32_t sum_m = __msa_copy_s_w((v4i32)res2, 0);
627 sum_m = __msa_copy_s_w((v4i32)res0_m, 0);
644 #define HADD_SH2_SW(...) HADD_SH2(v4i32, __VA_ARGS__)
650 #define HADD_SH4_SW(...) HADD_SH4(v4i32, __VA_ARGS__)
666 #define HSUB_UB2_SW(...) HSUB_UB2(v4i32, __VA_ARGS__)
675 out = (RTYPE)__msa_insert_w((v4i32)out, 0, in0); \
676 out = (RTYPE)__msa_insert_w((v4i32)out, 1, in1); \
682 out = (RTYPE)__msa_insert_w((v4i32)out, 0, in0); \
683 out = (RTYPE)__msa_insert_w((v4i32)out, 1, in1); \
684 out = (RTYPE)__msa_insert_w((v4i32)out, 2, in2); \
685 out = (RTYPE)__msa_insert_w((v4i32)out, 3, in3); \
689 #define INSERT_W4_SW(...) INSERT_W4(v4i32, __VA_ARGS__)
753 #define ILVEV_H2_SW(...) ILVEV_H2(v4i32, __VA_ARGS__)
769 #define ILVOD_H2_SW(...) ILVOD_H2(v4i32, __VA_ARGS__)
779 out0 = (RTYPE)__msa_ilvev_w((v4i32)in1, (v4i32)in0); \
780 out1 = (RTYPE)__msa_ilvev_w((v4i32)in3, (v4i32)in2); \
797 out0 = (RTYPE)__msa_ilvev_w((v4i32)in1, (v4i32)in0); \
798 out1 = (RTYPE)__msa_ilvod_w((v4i32)in3, (v4i32)in2); \
803 #define ILVEVOD_W2_SW(...) ILVEVOD_W2(v4i32, __VA_ARGS__)
821 #define ILVEVOD_H2_SW(...) ILVEVOD_H2(v4i32, __VA_ARGS__)
836 #define ILVEV_D2_SW(...) ILVEV_D2(v4i32, __VA_ARGS__)
854 #define ILVL_B2_SW(...) ILVL_B2(v4i32, __VA_ARGS__)
871 #define ILVR_B2_SW(...) ILVR_B2(v4i32, __VA_ARGS__)
882 #define ILVR_B4_SW(...) ILVR_B4(v4i32, __VA_ARGS__)
897 #define ILVR_H2_SW(...) ILVR_H2(v4i32, __VA_ARGS__)
906 #define ILVR_H4_SW(...) ILVR_H4(v4i32, __VA_ARGS__)
946 #define ILVRL_B2_SW(...) ILVRL_B2(v4i32, __VA_ARGS__)
955 #define ILVRL_H2_SW(...) ILVRL_H2(v4i32, __VA_ARGS__)
959 out0 = (RTYPE)__msa_ilvr_w((v4i32)in0, (v4i32)in1); \
960 out1 = (RTYPE)__msa_ilvl_w((v4i32)in0, (v4i32)in1); \
964 #define ILVRL_W2_SW(...) ILVRL_W2(v4i32, __VA_ARGS__)
982 #define PCKEV_B2_SW(...) PCKEV_B2(v4i32, __VA_ARGS__)
992 #define PCKEV_B4_SW(...) PCKEV_B4(v4i32, __VA_ARGS__)
1008 #define PCKEV_H2_SW(...) PCKEV_H2(v4i32, __VA_ARGS__)
1020 out0 = (RTYPE)__msa_pckev_w((v4i32)in0, (v4i32)in1); \
1021 out1 = (RTYPE)__msa_pckev_w((v4i32)in2, (v4i32)in3); \
1025 #define PCKEV_W2_SW(...) PCKEV_W2(v4i32, __VA_ARGS__)
1042 #define PCKOD_H2_SW(...) PCKOD_H2(v4i32, __VA_ARGS__)
1056 #define SRAI_W2_SW(...) SRAI_W2(v4i32, __VA_ARGS__)
1063 #define SRAI_W4_SW(...) SRAI_W4(v4i32, __VA_ARGS__)
1088 in0 = (RTYPE)__msa_srari_w((v4i32)in0, shift); \
1089 v4i32)in1, shift); \
1091 #define SRARI_W2_SW(...) SRARI_W2(v4i32, __VA_ARGS__)
1099 #define SRARI_W4_SW(...) SRARI_W4(v4i32, __VA_ARGS__)
1115 #define SRAR_D2_SW(...) SRAR_D2(v4i32, __VA_ARGS__)
1149 #define ADDVI_W2_SW(...) ADDVI_W2(v4i32, __VA_ARGS__)
1161 #define FILL_W2_SW(...) FILL_W2(v4i32, __VA_ARGS__)
1245 out = (v4i32)__msa_ilvr_h(sign_m, (v8i16)in); \
1309 v4i32 tmp2_m, tmp3_m; \
1335 v4i32 s0_m, s1_m, s2_m, s3_m; \
1343 #define TRANSPOSE4x4_SW_SW(...) TRANSPOSE4x4_W(v4i32, __VA_ARGS__)
