Cross Reference: /hardware/intel/img/psb_video/src/pnw

Lines Matching refs:mv_mode
678     P5(mv_mode);
891     ctx->mv_mode = pic_params->mv_fields.bits.mv_mode;
892     if (ctx->mv_mode == WMF_MVMODE_INTENSITY_COMPENSATION) {
893         ctx->mv_mode = pic_params->mv_fields.bits.mv_mode2;
901             ctx->mv_mode = WMF_MVMODE_MIXED_MV;
902             pic_params->mv_fields.bits.mv_mode = WMF_MVMODE_MIXED_MV;
904             ctx->mv_mode = WMF_MVMODE_1MV;
905             pic_params->mv_fields.bits.mv_mode = WMF_MVMODE_1MV;
912     if ((ctx->mv_mode == WMF_MVMODE_1MV) || (ctx->mv_mode == WMF_MVMODE_MIXED_MV)) {
1512                 ui16Table = MBMODETableFLDI[pic_params->mb_mode_table][(pic_params->mv_fields.bits.mv_mode == WMF_MVMODE_MIXED_MV) ? 1 : 0];
2093         REGIO_WRITE_FIELD(cmd, VC1_RENDEC_CMD, VC1SLICE02, SUBPEL_FILTER_MODE, ((ctx->mv_mode == WMF_MVMODE_1MV_HALF_PEL_BILINEAR) && !(pic_params->picture_fields.bits.frame_coding_mode == VC1_FCM_FRMI)) ? 0 : 1);
2173         REGIO_WRITE_FIELD(cmd, MSVDX_VEC_VC1, CR_VEC_VC1_BE_PPS1, VC1_BE_MVMODE,         pic_params->mv_fields.bits.mv_mode);
2368         REGIO_WRITE_FIELD(reg_value, MSVDX_VEC_VC1, CR_VEC_VC1_FE_PPS1, VC1_FE_MVMODE,      pic_params->mv_fields.bits.mv_mode);
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