Lines Matching refs:Cycles
41 // fixed number of cycles after dispatch. If a resource is unbuffered, then
54 /// scheduling class for the specified number of cycles.
57 unsigned Cycles;
60 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
64 /// Specify the latency in cpu cycles for a particular scheduling class and def
70 int Cycles;
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
78 /// Specify the number of cycles allowed after instruction issue before a
80 /// write's latency. Here we allow negative cycles for corner cases where
89 int Cycles;
93 && Cycles == Other.Cycles;
173 // By default, this is set to an arbitrarily high number of cycles
178 // MispredictPenalty is the typical number of extra cycles the processor
