Lines Matching defs:ST4
358 ST4
827 ST4: "ST4",
3040 // ST4 <Vt>.<t>, [<Xn|SP>]
3041 {0xbffff000, 0x0c000000, ST4, instArgs{arg_Vt_4_arrangement_size_Q___8B_00__16B_01__4H_10__8H_11__2S_20__4S_21__2D_31, arg_Xns_mem_offset}, nil},
3042 // ST4 <Vt>.<t>, [<Xn|SP>], #<imm>
3043 {0xbffff000, 0x0c9f0000, ST4, instArgs{arg_Vt_4_arrangement_size_Q___8B_00__16B_01__4H_10__8H_11__2S_20__4S_21__2D_31, arg_Xns_mem_post_Q__32_0__64_1}, nil},
3044 // ST4 <Vt>.<t>, [<Xn|SP>], #<Xm>
3045 {0xbfe0f000, 0x0c800000, ST4, instArgs{arg_Vt_4_arrangement_size_Q___8B_00__16B_01__4H_10__8H_11__2S_20__4S_21__2D_31, arg_Xns_mem_post_Xm}, nil},
3046 // ST4 <Vt>.B[<index>], [<Xn|SP>]
3047 {0xbfffe000, 0x0d202000, ST4, instArgs{arg_Vt_4_arrangement_B_index__Q_S_size_1, arg_Xns_mem_offset}, nil},
3048 // ST4 <Vt>.H[<index_2>], [<Xn|SP>]
3049 {0xbfffe400, 0x0d206000, ST4, instArgs{arg_Vt_4_arrangement_H_index__Q_S_size_1, arg_Xns_mem_offset}, nil},
3050 // ST4 <Vt>.S[<index_3>], [<Xn|SP>]
3051 {0xbfffec00, 0x0d20a000, ST4, instArgs{arg_Vt_4_arrangement_S_index__Q_S_1, arg_Xns_mem_offset}, nil},
3052 // ST4 <Vt>.D[<index_1>], [<Xn|SP>]
3053 {0xbffffc00, 0x0d20a400, ST4, instArgs{arg_Vt_4_arrangement_D_index__Q_1, arg_Xns_mem_offset}, nil},
3054 // ST4 <Vt>.B[<index>], [<Xn|SP>], #4
3055 {0xbfffe000, 0x0dbf2000, ST4, instArgs{arg_Vt_4_arrangement_B_index__Q_S_size_1, arg_Xns_mem_post_fixedimm_4}, nil},
3056 // ST4 <Vt>.B[<index>], [<Xn|SP>], #<Xm>
3057 {0xbfe0e000, 0x0da02000, ST4, instArgs{arg_Vt_4_arrangement_B_index__Q_S_size_1, arg_Xns_mem_post_Xm}, nil},
3058 // ST4 <Vt>.H[<index_2>], [<Xn|SP>], #8
3059 {0xbfffe400, 0x0dbf6000, ST4, instArgs{arg_Vt_4_arrangement_H_index__Q_S_size_1, arg_Xns_mem_post_fixedimm_8}, nil},
3060 // ST4 <Vt>.H[<index_2>], [<Xn|SP>], #<Xm>
3061 {0xbfe0e400, 0x0da06000, ST4, instArgs{arg_Vt_4_arrangement_H_index__Q_S_size_1, arg_Xns_mem_post_Xm}, nil},
3062 // ST4 <Vt>.S[<index_3>], [<Xn|SP>], #16
3063 {0xbfffec00, 0x0dbfa000, ST4, instArgs{arg_Vt_4_arrangement_S_index__Q_S_1, arg_Xns_mem_post_fixedimm_16}, nil},
3064 // ST4 <Vt>.S[<index_3>], [<Xn|SP>], #<Xm>
3065 {0xbfe0ec00, 0x0da0a000, ST4, instArgs{arg_Vt_4_arrangement_S_index__Q_S_1, arg_Xns_mem_post_Xm}, nil},
3066 // ST4 <Vt>.D[<index_1>], [<Xn|SP>], #32
3067 {0xbffffc00, 0x0dbfa400, ST4, instArgs{arg_Vt_4_arrangement_D_index__Q_1, arg_Xns_mem_post_fixedimm_32}, nil},
3068 // ST4 <Vt>.D[<index_1>], [<Xn|SP>], #<Xm>
3069 {0xbfe0fc00, 0x0da0a400, ST4, instArgs{arg_Vt_4_arrangement_D_index__Q_1, arg_Xns_mem_post_Xm}, nil},
