Lines Matching refs:Rs
236 int Rs __unused)
595 int Rd, int Rm, int Rs, int Rn) {
600 mMips->MUL(R_at, Rm, Rs);
609 int Rd, int Rm, int Rs) {
611 mMips->MUL(Rd, Rm, Rs);
619 int RdLo, int RdHi, int Rm, int Rs) {
621 mMips->MUH(RdHi, Rm, Rs);
622 mMips->MUL(RdLo, Rm, Rs);
632 int RdLo __unused, int RdHi, int Rm __unused, int Rs __unused) {
634 "UMUAL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs);
636 // (RdHi<<16) | (RdLo<<12) | (Rs<<8) | 0x90 | Rm;
648 int RdLo __unused, int RdHi, int Rm __unused, int Rs __unused) {
650 "SMULL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs);
652 // (RdHi<<16) | (RdLo<<12) | (Rs<<8) | 0x90 | Rm;
663 int RdLo __unused, int RdHi, int Rm __unused, int Rs __unused) {
665 "SMUAL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs);
667 // (RdHi<<16) | (RdLo<<12) | (Rs<<8) | 0x90 | Rm;
1072 int Rd, int Rm, int Rs)
1078 // where x corresponds to Rm and y to Rs
1088 // select half-reg for Rs
1091 mMips->SRA(R_at2, Rs, 16);
1094 mMips->SEH(R_at2, Rs);
1101 int Rd, int Rm, int Rs)
1105 // the selector yT or yB refers to reg Rs
1108 mMips->SRL(R_at, Rs, 16);
1113 mMips->SLL(R_at, Rs, 16);
1118 // 16 x 16 signed multiply, accumulate: Rd = Rm{16} * Rs{16} + Rn
1120 int Rd, int Rm, int Rs, int Rn)
1126 // where x corresponds to Rm and y to Rs
1136 // select half-reg for Rs
1139 mMips->SRA(R_at2, Rs, 16);
1142 mMips->SEH(R_at2, Rs);
1151 int Rs __unused, int Rm __unused)
1153 // *mPC++ = (cc<<28) | 0x1400080 | (RdHi<<16) | (RdLo<<12) | (Rs<<8) | (xy<<4) | Rm;
1161 int Rs __unused, int Rn __unused)
1163 // *mPC++ = (cc<<28) | 0x1200080 | (Rd<<16) | (Rn<<12) | (Rs<<8) | (y<<4) | Rm;
1379 void MIPS64Assembler::DADDU(int Rd, int Rs, int Rt)
1382 | (Rs<<RS_SHF) | (Rt<<RT_SHF) | (Rd<<RD_SHF);
1385 void MIPS64Assembler::DADDIU(int Rt, int Rs, int16_t imm)
1387 *mPC++ = (daddiu_op<<OP_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF) | (imm & MSK_16);
1390 void MIPS64Assembler::DSUBU(int Rd, int Rs, int Rt)
1393 (Rs<<RS_SHF) | (Rt<<RT_SHF) | (Rd<<RD_SHF) ;
1396 void MIPS64Assembler::DSUBIU(int Rt, int Rs, int16_t imm) // really addiu(d, s, -j)
1398 *mPC++ = (daddiu_op<<OP_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF) | ((-imm) & MSK_16);
1401 void MIPS64Assembler::MUL(int Rd, int Rs, int Rt)
1404 (Rs<<RS_SHF) | (Rt<<RT_SHF) | (Rd<<RD_SHF) ;
1407 void MIPS64Assembler::MUH(int Rd, int Rs, int Rt)
1410 (Rs<<RS_SHF) | (Rt<<RT_SHF) | (Rd<<RD_SHF) ;
1413 void MIPS64Assembler::CLO(int Rd, int Rs)
1416 (Rd<<RD_SHF) | (Rs<<RS_SHF) | (1<<RE_SHF);
1419 void MIPS64Assembler::CLZ(int Rd, int Rs)
1422 (Rd<<RD_SHF) | (Rs<<RS_SHF) | (1<<RE_SHF);
1441 void MIPS64Assembler::JR(int Rs)
1443 *mPC++ = (spec_op<<OP_SHF) | (Rs<<RS_SHF) | (jalr_fn << FUNC_SHF);
