Lines Matching full:simm16
23 (dnh h-simm16 "16-bit signed immediate" ((MACH ORBIS-MACHS)) (immediate (INT 16)) () () ())
83 (df f-simm16 "simm16" ((MACH ORBIS-MACHS) SIGN-OPT) 15 16 INT #f #f)
109 (name f-simm16-split)
116 (and (sra (ifield f-simm16-split)
120 (and (ifield f-simm16-split)
123 (set (ifield f-simm16-split)
316 (name simm16)
319 (type h-simm16)
320 (index f-simm16)
321 (handlers (parse "simm16"))
334 (name simm16-split)
337 (type h-simm16)
338 (index f-simm16-split)
339 (handlers (parse "simm16"))
595 (dni l-lwz "l.lwz reg/simm16(reg)"
597 "l.lwz $rD,${simm16}($rA)"
598 (+ OPC_LWZ rD rA simm16)
599 (set UWI rD (zext UWI (mem USI (load-store-addr rA simm16 4))))
604 (dni l-lws "l.lws reg/simm16(reg)"
606 "l.lws $rD,${simm16}($rA)"
607 (+ OPC_LWS rD rA simm16)
608 (set WI rD (ext WI (mem SI (load-store-addr rA simm16 4))))
612 (dni l-lwa "l.lwa reg/simm16(reg)"
614 "l.lwa $rD,${simm16}($rA)"
615 (+ OPC_LWA rD rA simm16)
617 (set UWI rD (zext UWI (mem USI (load-store-addr rA simm16 4))))
619 (set atomic-address (load-store-addr rA simm16 4))
624 (dni l-lbz "l.lbz reg/simm16(reg)"
626 "l.lbz $rD,${simm16}($rA)"
627 (+ OPC_LBZ rD rA simm16)
628 (set UWI rD (zext UWI (mem UQI (load-store-addr rA simm16 1))))
632 (dni l-lbs "l.lbs reg/simm16(reg)"
634 "l.lbs $rD,${simm16}($rA)"
635 (+ OPC_LBS rD rA simm16)
636 (set WI rD (ext WI (mem QI (load-store-addr rA simm16 1))))
640 (dni l-lhz "l.lhz reg/simm16(reg)"
642 "l.lhz $rD,${simm16}($rA)"
643 (+ OPC_LHZ rD simm16 rA)
644 (set UWI rD (zext UWI (mem UHI (load-store-addr rA simm16 2))))
648 (dni l-lhs "l.lhs reg/simm16(reg)"
650 "l.lhs $rD,${simm16}($rA)"
651 (+ OPC_LHS rD rA simm16)
652 (set WI rD (ext WI (mem HI (load-store-addr rA simm16 2))))
663 (.str "l." mnemonic " simm16(reg)/reg")
665 (.str "l." mnemonic " ${simm16-split}($rA),$rB")
666 (+ opc-op rA rB simm16-split)
668 (set addr (load-store-addr rA simm16-split size))
683 (dni l-swa "l.swa simm16(reg)/reg"
685 "l.swa ${simm16-split}($rA),$rB"
686 (+ OPC_SWA rA rB simm16)
688 (set addr (load-store-addr rA simm16-split 4))
886 (.str "l." mnemonic " reg/reg/simm16")
888 (.str "l." mnemonic "i $rD,$rA,$simm16")
889 (+ (.sym OPC_ (.upcase mnemonic) "I") rD rA simm16)
890 (set rD (mnemonic rA (ext WI simm16)))
916 (.str "l." mnemonic "i reg/reg/simm16")
918 (.str "l." mnemonic "i $rD,$rA,$simm16")
919 (+ (.sym OPC_ (.upcase mnemonic) "I") rD rA simm16)
922 (set BI sys-sr-cy ((.sym mnemonic "c-cflag") WI rA (ext WI simm16) 0))
923 (set BI sys-sr-ov ((.sym mnemonic "c-oflag") WI rA (ext WI simm16) 0))
924 (set rD (mnemonic WI rA (ext WI simm16)))
937 ("l.addic reg/reg/simm16")
939 ("l.addic $rD,$rA,$simm16")
940 (+ OPC_ADDIC rD rA simm16)
944 (set BI sys-sr-cy (addc-cflag WI rA (ext WI simm16) tmp-sys-sr-cy))
945 (set BI sys-sr-ov (addc-oflag WI rA (ext WI simm16) tmp-sys-sr-cy))
946 (set WI rD (addc WI rA (ext WI simm16) tmp-sys-sr-cy))
955 "l.muli reg/reg/simm16"
957 ("l.muli $rD,$rA,$simm16")
958 (+ OPC_MULI rD rA simm16)
962 (set sys-sr-ov (mul-o2flag WI rA (ext WI simm16)))
964 (set sys-sr-cy (mul-o1flag UWI rA (ext UWI simm16)))
965 (set rD (mul WI rA (ext WI simm16)))
1033 (.str "l.sf" op "si reg/simm16") ; "l.sfgtsi reg/simm16"
1035 (.str "l.sf" op "si $rA,$simm16") ; "l.sfgtsi $rA,$simm16"
1036 (+ OPC_SFI (.sym "OPC_SF_" (.upcase op) "S") rA simm16) ; (+ OPC_SFI OPC_SF_GTS rA simm16)
1037 (set sys-sr-f (op WI rA (ext WI simm16))) ; (set sys-sr-f (gt WI rA (ext WI simm16)))
1050 (.str "l.sf" op "ui reg/simm16") ; "l.sfgtui reg/uimm16"
1052 (.str "l.sf" op "ui $rA,$simm16simm16"
1053 (+ OPC_SFI (.sym "OPC_SF_" (.upcase op) "U") rA simm16) ; (+ OPC_SFI OPC_SF_GTU rA simm16)
1054 (set sys-sr-f ((.sym op "u") WI rA (ext WI simm16))) ; (set sys-sr-f (gtu WI rA (ext WI simm16)))
1077 (.str "l.sf" op "i reg/simm16")
1079 (.str "l.sf" op "i $rA,$simm16")
1080 (+ OPC_SFI (.sym "OPC_SF_" (.upcase op)) rA simm16)
1081 (set sys-sr-f (op WI rA (ext WI simm16)))
1119 "l.maci reg/simm16"
1121 "l.maci $rA,${simm16}"
1122 (+ OPC_MACI (f-resv-25-5 0) rA simm16)
1124 (set WI prod (mul WI (ext WI simm16) rA))
