Lines Matching refs:to2
32 vcvtpd2qq (%eax){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
37 vcvtpd2qq 1016(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
38 vcvtpd2qq 1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
39 vcvtpd2qq -1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
40 vcvtpd2qq -1032(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
58 vcvtpd2uqq (%eax){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
63 vcvtpd2uqq 1016(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
64 vcvtpd2uqq 1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
65 vcvtpd2uqq -1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
66 vcvtpd2uqq -1032(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
84 vcvtps2qq (%eax){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
89 vcvtps2qq 508(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
90 vcvtps2qq 512(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
91 vcvtps2qq -512(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
92 vcvtps2qq -516(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
110 vcvtps2uqq (%eax){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
115 vcvtps2uqq 508(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
116 vcvtps2uqq 512(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
117 vcvtps2uqq -512(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
118 vcvtps2uqq -516(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
136 vcvtqq2pd (%eax){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
141 vcvtqq2pd 1016(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
142 vcvtqq2pd 1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
143 vcvtqq2pd -1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
144 vcvtqq2pd -1032(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
162 vcvtqq2ps (%eax){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
167 vcvtqq2psx 1016(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
168 vcvtqq2psx 1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
169 vcvtqq2psx -1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
170 vcvtqq2psx -1032(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
188 vcvtuqq2pd (%eax){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
193 vcvtuqq2pd 1016(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
194 vcvtuqq2pd 1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
195 vcvtuqq2pd -1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
196 vcvtuqq2pd -1032(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
214 vcvtuqq2ps (%eax){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
219 vcvtuqq2psx 1016(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
220 vcvtuqq2psx 1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
221 vcvtuqq2psx -1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
222 vcvtuqq2psx -1032(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
246 vfpclasspd $123, (%eax){1to2}, %k5{%k7} # AVX512{DQ,VL}
251 vfpclasspdx $123, 1016(%edx){1to2}, %k5{%k7} # AVX512{DQ,VL} Disp8
252 vfpclasspdx $123, 1024(%edx){1to2}, %k5{%k7} # AVX512{DQ,VL}
253 vfpclasspdx $123, -1024(%edx){1to2}, %k5{%k7} # AVX512{DQ,VL} Disp8
254 vfpclasspdx $123, -1032(%edx){1to2}, %k5{%k7} # AVX512{DQ,VL}
332 vpmullq (%eax){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
337 vpmullq 1016(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL} Disp8
338 vpmullq 1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
339 vpmullq -1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL} Disp8
340 vpmullq -1032(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
359 vrangepd $123, (%eax){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
364 vrangepd $123, 1016(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL} Disp8
365 vrangepd $123, 1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
366 vrangepd $123, -1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL} Disp8
367 vrangepd $123, -1032(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
414 vandpd (%eax){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
419 vandpd 1016(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL} Disp8
420 vandpd 1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
421 vandpd -1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL} Disp8
422 vandpd -1032(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
466 vandnpd (%eax){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
471 vandnpd 1016(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL} Disp8
472 vandnpd 1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
473 vandnpd -1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL} Disp8
474 vandnpd -1032(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
518 vorpd (%eax){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
523 vorpd 1016(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL} Disp8
524 vorpd 1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
525 vorpd -1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL} Disp8
526 vorpd -1032(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
570 vxorpd (%eax){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
575 vxorpd 1016(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL} Disp8
576 vxorpd 1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
577 vxorpd -1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL} Disp8
578 vxorpd -1032(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{DQ,VL}
623 vreducepd $123, (%eax){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
628 vreducepd $123, 1016(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
629 vreducepd $123, 1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
630 vreducepd $123, -1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
631 vreducepd $123, -1032(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
692 vcvttpd2qq (%eax){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
697 vcvttpd2qq 1016(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
698 vcvttpd2qq 1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
699 vcvttpd2qq -1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
700 vcvttpd2qq -1032(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
718 vcvttpd2uqq (%eax){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
723 vcvttpd2uqq 1016(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
724 vcvttpd2uqq 1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
725 vcvttpd2uqq -1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
726 vcvttpd2uqq -1032(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
744 vcvttps2qq (%eax){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
749 vcvttps2qq 508(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
750 vcvttps2qq 512(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
751 vcvttps2qq -512(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
752 vcvttps2qq -516(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
770 vcvttps2uqq (%eax){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
775 vcvttps2uqq 508(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
776 vcvttps2uqq 512(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
777 vcvttps2uqq -512(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
778 vcvttps2uqq -516(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
828 vcvtpd2qq xmm6{k7}, [eax]{1to2} # AVX512{DQ,VL}
833 vcvtpd2qq xmm6{k7}, [edx+1016]{1to2} # AVX512{DQ,VL} Disp8
834 vcvtpd2qq xmm6{k7}, [edx+1024]{1to2} # AVX512{DQ,VL}
835 vcvtpd2qq xmm6{k7}, [edx-1024]{1to2} # AVX512{DQ,VL} Disp8
836 vcvtpd2qq xmm6{k7}, [edx-1032]{1to2} # AVX512{DQ,VL}
854 vcvtpd2uqq xmm6{k7}, [eax]{1to2} # AVX512{DQ,VL}
859 vcvtpd2uqq xmm6{k7}, [edx+1016]{1to2} # AVX512{DQ,VL} Disp8
860 vcvtpd2uqq xmm6{k7}, [edx+1024]{1to2} # AVX512{DQ,VL}
861 vcvtpd2uqq xmm6{k7}, [edx-1024]{1to2} # AVX512{DQ,VL} Disp8
862 vcvtpd2uqq xmm6{k7}, [edx-1032]{1to2} # AVX512{DQ,VL}
880 vcvtps2qq xmm6{k7}, [eax]{1to2} # AVX512{DQ,VL}
885 vcvtps2qq xmm6{k7}, [edx+508]{1to2} # AVX512{DQ,VL} Disp8
886 vcvtps2qq xmm6{k7}, [edx+512]{1to2} # AVX512{DQ,VL}
887 vcvtps2qq xmm6{k7}, [edx-512]{1to2} # AVX512{DQ,VL} Disp8
888 vcvtps2qq xmm6{k7}, [edx-516]{1to2} # AVX512{DQ,VL}
889 vcvtps2qq xmm6{k7}, DWORD PTR [edx+508]{1to2} # AVX512{DQ,VL} Disp8
908 vcvtps2uqq xmm6{k7}, [eax]{1to2} # AVX512{DQ,VL}
913 vcvtps2uqq xmm6{k7}, [edx+508]{1to2} # AVX512{DQ,VL} Disp8
914 vcvtps2uqq xmm6{k7}, [edx+512]{1to2} # AVX512{DQ,VL}
915 vcvtps2uqq xmm6{k7}, [edx-512]{1to2} # AVX512{DQ,VL} Disp8
916 vcvtps2uqq xmm6{k7}, [edx-516]{1to2} # AVX512{DQ,VL}
917 vcvtps2uqq xmm6{k7}, DWORD PTR [edx+508]{1to2} # AVX512{DQ,VL} Disp8
936 vcvtqq2pd xmm6{k7}, [eax]{1to2} # AVX512{DQ,VL}
941 vcvtqq2pd xmm6{k7}, [edx+1016]{1to2} # AVX512{DQ,VL} Disp8
942 vcvtqq2pd xmm6{k7}, [edx+1024]{1to2} # AVX512{DQ,VL}
943 vcvtqq2pd xmm6{k7}, [edx-1024]{1to2} # AVX512{DQ,VL} Disp8
944 vcvtqq2pd xmm6{k7}, [edx-1032]{1to2} # AVX512{DQ,VL}
962 vcvtqq2ps xmm6{k7}, [eax]{1to2} # AVX512{DQ,VL}
967 vcvtqq2ps xmm6{k7}, QWORD PTR [edx+1016]{1to2} # AVX512{DQ,VL} Disp8
968 vcvtqq2ps xmm6{k7}, QWORD PTR [edx+1024]{1to2} # AVX512{DQ,VL}
969 vcvtqq2ps xmm6{k7}, QWORD PTR [edx-1024]{1to2} # AVX512{DQ,VL} Disp8
970 vcvtqq2ps xmm6{k7}, QWORD PTR [edx-1032]{1to2} # AVX512{DQ,VL}
988 vcvtuqq2pd xmm6{k7}, [eax]{1to2} # AVX512{DQ,VL}
993 vcvtuqq2pd xmm6{k7}, [edx+1016]{1to2} # AVX512{DQ,VL} Disp8
994 vcvtuqq2pd xmm6{k7}, [edx+1024]{1to2} # AVX512{DQ,VL}
995 vcvtuqq2pd xmm6{k7}, [edx-1024]{1to2} # AVX512{DQ,VL} Disp8
996 vcvtuqq2pd xmm6{k7}, [edx-1032]{1to2} # AVX512{DQ,VL}
1014 vcvtuqq2ps xmm6{k7}, [eax]{1to2} # AVX512{DQ,VL}
1019 vcvtuqq2ps xmm6{k7}, QWORD PTR [edx+1016]{1to2} # AVX512{DQ,VL} Disp8
1020 vcvtuqq2ps xmm6{k7}, QWORD PTR [edx+1024]{1to2} # AVX512{DQ,VL}
1021 vcvtuqq2ps xmm6{k7}, QWORD PTR [edx-1024]{1to2} # AVX512{DQ,VL} Disp8
1022 vcvtuqq2ps xmm6{k7}, QWORD PTR [edx-1032]{1to2} # AVX512{DQ,VL}
1046 vfpclasspd k5{k7}, [eax]{1to2}, 123 # AVX512{DQ,VL}
1051 vfpclasspd k5{k7}, QWORD PTR [edx+1016]{1to2}, 123 # AVX512{DQ,VL} Disp8
1052 vfpclasspd k5{k7}, QWORD PTR [edx+1024]{1to2}, 123 # AVX512{DQ,VL}
1053 vfpclasspd k5{k7}, QWORD PTR [edx-1024]{1to2}, 123 # AVX512{DQ,VL} Disp8
1054 vfpclasspd k5{k7}, QWORD PTR [edx-1032]{1to2}, 123 # AVX512{DQ,VL}
1132 vpmullq xmm6{k7}, xmm5, [eax]{1to2} # AVX512{DQ,VL}
1137 vpmullq xmm6{k7}, xmm5, [edx+1016]{1to2} # AVX512{DQ,VL} Disp8
1138 vpmullq xmm6{k7}, xmm5, [edx+1024]{1to2} # AVX512{DQ,VL}
1139 vpmullq xmm6{k7}, xmm5, [edx-1024]{1to2} # AVX512{DQ,VL} Disp8
1140 vpmullq xmm6{k7}, xmm5, [edx-1032]{1to2} # AVX512{DQ,VL}
1159 vrangepd xmm6{k7}, xmm5, [eax]{1to2}, 123 # AVX512{DQ,VL}
1164 vrangepd xmm6{k7}, xmm5, [edx+1016]{1to2}, 123 # AVX512{DQ,VL} Disp8
1165 vrangepd xmm6{k7}, xmm5, [edx+1024]{1to2}, 123 # AVX512{DQ,VL}
1166 vrangepd xmm6{k7}, xmm5, [edx-1024]{1to2}, 123 # AVX512{DQ,VL} Disp8
1167 vrangepd xmm6{k7}, xmm5, [edx-1032]{1to2}, 123 # AVX512{DQ,VL}
1214 vandpd xmm6{k7}, xmm5, [eax]{1to2} # AVX512{DQ,VL}
1219 vandpd xmm6{k7}, xmm5, [edx+1016]{1to2} # AVX512{DQ,VL} Disp8
1220 vandpd xmm6{k7}, xmm5, [edx+1024]{1to2} # AVX512{DQ,VL}
1221 vandpd xmm6{k7}, xmm5, [edx-1024]{1to2} # AVX512{DQ,VL} Disp8
1222 vandpd xmm6{k7}, xmm5, [edx-1032]{1to2} # AVX512{DQ,VL}
1266 vandnpd xmm6{k7}, xmm5, [eax]{1to2} # AVX512{DQ,VL}
1271 vandnpd xmm6{k7}, xmm5, [edx+1016]{1to2} # AVX512{DQ,VL} Disp8
1272 vandnpd xmm6{k7}, xmm5, [edx+1024]{1to2} # AVX512{DQ,VL}
1273 vandnpd xmm6{k7}, xmm5, [edx-1024]{1to2} # AVX512{DQ,VL} Disp8
1274 vandnpd xmm6{k7}, xmm5, [edx-1032]{1to2} # AVX512{DQ,VL}
1318 vorpd xmm6{k7}, xmm5, [eax]{1to2} # AVX512{DQ,VL}
1323 vorpd xmm6{k7}, xmm5, [edx+1016]{1to2} # AVX512{DQ,VL} Disp8
1324 vorpd xmm6{k7}, xmm5, [edx+1024]{1to2} # AVX512{DQ,VL}
1325 vorpd xmm6{k7}, xmm5, [edx-1024]{1to2} # AVX512{DQ,VL} Disp8
1326 vorpd xmm6{k7}, xmm5, [edx-1032]{1to2} # AVX512{DQ,VL}
1370 vxorpd xmm6{k7}, xmm5, [eax]{1to2} # AVX512{DQ,VL}
1375 vxorpd xmm6{k7}, xmm5, [edx+1016]{1to2} # AVX512{DQ,VL} Disp8
1376 vxorpd xmm6{k7}, xmm5, [edx+1024]{1to2} # AVX512{DQ,VL}
1377 vxorpd xmm6{k7}, xmm5, [edx-1024]{1to2} # AVX512{DQ,VL} Disp8
1378 vxorpd xmm6{k7}, xmm5, [edx-1032]{1to2} # AVX512{DQ,VL}
1423 vreducepd xmm6{k7}, [eax]{1to2}, 123 # AVX512{DQ,VL}
1428 vreducepd xmm6{k7}, [edx+1016]{1to2}, 123 # AVX512{DQ,VL} Disp8
1429 vreducepd xmm6{k7}, [edx+1024]{1to2}, 123 # AVX512{DQ,VL}
1430 vreducepd xmm6{k7}, [edx-1024]{1to2}, 123 # AVX512{DQ,VL} Disp8
1431 vreducepd xmm6{k7}, [edx-1032]{1to2}, 123 # AVX512{DQ,VL}
1492 vcvttpd2qq xmm6{k7}, [eax]{1to2} # AVX512{DQ,VL}
1497 vcvttpd2qq xmm6{k7}, [edx+1016]{1to2} # AVX512{DQ,VL} Disp8
1498 vcvttpd2qq xmm6{k7}, [edx+1024]{1to2} # AVX512{DQ,VL}
1499 vcvttpd2qq xmm6{k7}, [edx-1024]{1to2} # AVX512{DQ,VL} Disp8
1500 vcvttpd2qq xmm6{k7}, [edx-1032]{1to2} # AVX512{DQ,VL}
1518 vcvttpd2uqq xmm6{k7}, [eax]{1to2} # AVX512{DQ,VL}
1523 vcvttpd2uqq xmm6{k7}, [edx+1016]{1to2} # AVX512{DQ,VL} Disp8
1524 vcvttpd2uqq xmm6{k7}, [edx+1024]{1to2} # AVX512{DQ,VL}
1525 vcvttpd2uqq xmm6{k7}, [edx-1024]{1to2} # AVX512{DQ,VL} Disp8
1526 vcvttpd2uqq xmm6{k7}, [edx-1032]{1to2} # AVX512{DQ,VL}
1544 vcvttps2qq xmm6{k7}, [eax]{1to2} # AVX512{DQ,VL}
1549 vcvttps2qq xmm6{k7}, [edx+508]{1to2} # AVX512{DQ,VL} Disp8
1550 vcvttps2qq xmm6{k7}, [edx+512]{1to2} # AVX512{DQ,VL}
1551 vcvttps2qq xmm6{k7}, [edx-512]{1to2} # AVX512{DQ,VL} Disp8
1552 vcvttps2qq xmm6{k7}, [edx-516]{1to2} # AVX512{DQ,VL}
1553 vcvttps2qq xmm6{k7}, DWORD PTR [edx+508]{1to2} # AVX512{DQ,VL} Disp8
1572 vcvttps2uqq xmm6{k7}, [eax]{1to2} # AVX512{DQ,VL}
1577 vcvttps2uqq xmm6{k7}, [edx+508]{1to2} # AVX512{DQ,VL} Disp8
1578 vcvttps2uqq xmm6{k7}, [edx+512]{1to2} # AVX512{DQ,VL}
1579 vcvttps2uqq xmm6{k7}, [edx-512]{1to2} # AVX512{DQ,VL} Disp8
1580 vcvttps2uqq xmm6{k7}, [edx-516]{1to2} # AVX512{DQ,VL}
1581 vcvttps2uqq xmm6{k7}, DWORD PTR [edx+508]{1to2} # AVX512{DQ,VL} Disp8
