Lines Matching refs:dst
206 int dst = 0;
222 case 0: /* Emulated work with dst register. */
258 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm))
262 sprintf (op, "0x%04x", dst);
264 PS ((short) (addr + 2) + dst));
267 dst |= extended_dst << 16;
268 sprintf (op, "0x%05x", dst);
270 (long)((addr + 2 + dst) & 0xfffff));
277 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm))
281 sprintf (op, "&0x%04x", PS (dst));
284 dst |= extended_dst << 16;
285 sprintf (op, "&0x%05x", dst & 0xfffff);
291 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm))
297 dst |= extended_dst << 16;
298 if (dst & 0x80000)
299 dst |= -1U << 20;
301 sprintf (op, "%d(r%d)", dst, regd);
333 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm))
336 sprintf (op, "#%d", dst);
337 if (dst > 9 || dst < 0)
338 sprintf (comm, "#0x%04x", PS (dst));
341 dst |= extended_dst << 16;
342 if (dst & 0x80000)
343 dst |= -1U << 20;
344 sprintf (op, "#%d", dst);
345 if (dst > 9 || dst < 0)
346 sprintf (comm, "#0x%05x", dst);
359 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm))
362 sprintf (op, "0x%04x", PS (dst));
364 PS ((short) addr + 2 + dst));
367 dst |= extended_dst << 16;
368 sprintf (op, "0x%05x", dst & 0xffff);
370 (long)((addr + 2 + dst) & 0xfffff));
377 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm))
380 sprintf (op, "&0x%04x", PS (dst));
383 dst |= extended_dst << 16;
384 sprintf (op, "&0x%05x", dst & 0xfffff);
397 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm))
402 dst |= extended_dst << 16;
403 if (dst & 0x80000)
404 dst |= -1U << 20;
406 sprintf (op, "%d(r%d)", dst, regd);
407 if (dst > 9 || dst < 0)
408 sprintf (comm, "%05x", dst);
450 int dst = 0;
469 /* With dst, there are only:
474 emulated_ins dst
475 basic_ins dst, dst. */
497 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
501 sprintf (op1, "0x%04x", PS (dst));
503 PS ((short) addr + 2 + dst));
506 dst |= extended_dst << 16;
507 if (dst & 0x80000)
508 dst |= -1U << 20;
509 sprintf (op1, "0x%05x", dst & 0xfffff);
511 (long)((addr + 2 + dst) & 0xfffff));
518 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
522 /* If the 'src' field is not the same as the dst
526 if (src != dst)
531 sprintf (op1, "&0x%04x", PS (dst));
534 dst |= extended_dst << 16;
535 sprintf (op1, "&0x%05x", dst & 0xfffff);
542 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
546 dst |= extended_dst << 16;
547 if (dst & 0x80000)
548 dst |= -1U << 20;
552 sprintf (op1, "%d(r%d)", dst, regd);
553 if (dst > 9 || dst < -9)
554 sprintf (comm1, "#0x%05x", dst);
599 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
602 sprintf (op1, "#%d", dst);
603 if (dst > 9 || dst < 0)
604 sprintf (comm1, "#0x%04x", PS (dst));
607 dst &= 0xffff;
608 dst |= extended_src << 16;
609 if (dst & 0x80000)
610 dst |= -1U << 20;
611 sprintf (op1, "#%d", dst);
612 if (dst > 9 || dst < 0)
613 sprintf (comm1, "0x%05x", dst & 0xfffff);
626 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
629 sprintf (op1, "0x%04x", PS (dst));
631 PS ((short) addr + 2 + dst));
634 dst &= 0xffff;
635 dst |= extended_src << 16;
636 if (dst & 0x80000)
637 dst |= -1U << 20;
638 sprintf (op1, "0x%05x", dst & 0xfffff);
640 (long) ((addr + 2 + dst) & 0xfffff));
648 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
651 sprintf (op1, "&0x%04x", PS (dst));
652 sprintf (comm1, "0x%04x", PS (dst));
655 dst &= 0xffff;
656 dst |= extended_src << 16;
657 sprintf (op1, "&0x%05x", dst & 0xfffff);
672 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
677 dst &= 0xffff;
678 dst |= extended_src << 16;
679 if (dst & 0x80000)
680 dst |= -1U << 20;
682 sprintf (op1, "%d(r%d)", dst, regs);
683 if (dst > 9 || dst < -9)
684 sprintf (comm1, "0x%05x", dst);
716 if (msp430dis_opcode_signed (addr + cmd_len, info, &dst, comm2))
718 sprintf (op2, "0x%04x", PS (dst));
720 PS ((short) addr + cmd_len + dst));
723 dst |= extended_dst << 16;
724 if (dst & 0x80000)
725 dst |= -1U << 20;
726 sprintf (op2, "0x%05x", dst & 0xfffff);
728 (long)((addr + cmd_len + dst) & 0xfffff));
736 if (msp430dis_opcode_signed (addr + cmd_len, info, &dst, comm2))
739 sprintf (op2, "&0x%04x", PS (dst));
742 dst |= extended_dst << 16;
743 sprintf (op2, "&0x%05x", dst & 0xfffff);
749 if (msp430dis_opcode_signed (addr + cmd_len, info, &dst, comm2))
752 if (dst > 9 || dst < 0)
753 sprintf (comm2, "0x%04x", PS (dst));
756 dst
757 if (dst & 0x80000)
758 dst |= -1U << 20;
759 if (dst > 9 || dst < 0)
760 sprintf (comm2, "0x%05x", dst & 0xfffff);
762 sprintf (op2, "%d(r%d)", dst, regd);
782 int dst = 0;
792 /* dst is a source register. */
835 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
839 sprintf (op1, "0x%04x", PS (dst));
841 PS ((short) addr + 2 + dst));
862 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
865 sprintf (op1, "%d(r%d)", dst, regs);
886 int dst = 0;
897 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
900 sprintf (op1, "%d(r%d)", dst, reg);
902 sprintf (comm1, "PC rel. 0x%05lx", (long) (addr + 2 + dst));
904 sprintf (comm1, "0x%05x", dst);
929 if (msp430dis_opcode_signed (addr + 2, info, &dst, comm1))
933 sprintf (op1, "%d(PC)", (reg << 16) + dst);
935 (long) (addr + 2 + dst + (reg << 16)));
