Home | History | Annotate | Download | only in Include
      1 /** @file
      2 Definitions for CPU S3 data.
      3 
      4 Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>
      5 This program and the accompanying materials
      6 are licensed and made available under the terms and conditions of the BSD License
      7 which accompanies this distribution.  The full text of the license may be found at
      8 http://opensource.org/licenses/bsd-license.php
      9 
     10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
     12 
     13 **/
     14 
     15 #ifndef _ACPI_CPU_DATA_H_
     16 #define _ACPI_CPU_DATA_H_
     17 
     18 //
     19 // Register types in register table
     20 //
     21 typedef enum {
     22   Msr,
     23   ControlRegister,
     24   MemoryMapped,
     25   CacheControl
     26 } REGISTER_TYPE;
     27 
     28 //
     29 // Element of register table entry
     30 //
     31 typedef struct {
     32   REGISTER_TYPE  RegisterType;
     33   UINT32         Index;
     34   UINT8          ValidBitStart;
     35   UINT8          ValidBitLength;
     36   UINT64         Value;
     37 } CPU_REGISTER_TABLE_ENTRY;
     38 
     39 //
     40 // Register table definition, including current table length,
     41 // allocated size of this table, and pointer to the list of table entries.
     42 //
     43 typedef struct {
     44   //
     45   // The number of valid entries in the RegisterTableEntry buffer
     46   //
     47   UINT32                    TableLength;
     48   UINT32                    NumberBeforeReset;
     49   //
     50   // The size, in bytes, of the RegisterTableEntry buffer
     51   //
     52   UINT32                    AllocatedSize;
     53   //
     54   // The initial APIC ID of the CPU this register table applies to
     55   //
     56   UINT32                    InitialApicId;
     57   //
     58   // Buffer of CPU_REGISTER_TABLE_ENTRY structures.  This buffer must be
     59   // allocated below 4GB from memory of type EfiACPIMemoryNVS.
     60   //
     61   CPU_REGISTER_TABLE_ENTRY  *RegisterTableEntry;
     62 } CPU_REGISTER_TABLE;
     63 
     64 //
     65 // Data structure that is required for ACPI S3 resume.  This structure must be
     66 // allocated below 4GB from memory of type EfiACPIMemoryNVS.  The PCD
     67 // PcdCpuS3DataAddress must be set to the physical address where this structure
     68 // is allocated
     69 //
     70 typedef struct {
     71   //
     72   // Physical address of 4KB buffer allocated below 1MB from memory of type
     73   // EfiReservedMemoryType.  The buffer is not required to be initialized, but
     74   // it is recommended that the buffer be zero-filled.  This buffer is used to
     75   // wake APs during an ACPI S3 resume.
     76   //
     77   EFI_PHYSICAL_ADDRESS  StartupVector;
     78   //
     79   // Physical address of structure of type IA32_DESCRIPTOR.  This structure must
     80   // be allocated below 4GB from memory of type EfiACPIMemoryNVS.  The
     81   // IA32_DESCRIPTOR structure provides the base address and length of a GDT
     82   // The buffer for GDT must also be allocated below 4GB from memory of type
     83   // EfiACPIMemoryNVS.  The GDT must be filled in with the GDT contents that are
     84   // used during an ACPI S3 resume.  This is typically the contents of the GDT
     85   // used by the boot processor when the platform is booted.
     86   //
     87   EFI_PHYSICAL_ADDRESS  GdtrProfile;
     88   //
     89   // Physical address of structure of type IA32_DESCRIPTOR.  This structure must
     90   // be allocated below 4GB from memory of type EfiACPIMemoryNVS.  The
     91   // IA32_DESCRIPTOR structure provides the base address and length of an IDT.
     92   // The buffer for IDT must also be allocated below 4GB from memory of type
     93   // EfiACPIMemoryNVS.  The IDT must be filled in with the IDT contents that are
     94   // used during an ACPI S3 resume.  This is typically the contents of the IDT
     95   // used by the boot processor when the platform is booted.
     96   //
     97   EFI_PHYSICAL_ADDRESS  IdtrProfile;
     98   //
     99   // Physical address of a buffer that is used as stacks during ACPI S3 resume.
    100   // The total size of this buffer, in bytes, is NumberOfCpus * StackSize.  This
    101   // structure must be allocated below 4GB from memory of type EfiACPIMemoryNVS.
    102   //
    103   EFI_PHYSICAL_ADDRESS  StackAddress;
    104   //
    105   // The size, in bytes, of the stack provided to each CPU during ACPI S3 resume.
    106   //
    107   UINT32                StackSize;
    108   //
    109   // The number of CPUs.  If a platform does not support hot plug CPUs, then
    110   // this is the number of CPUs detected when the platform is booted, regardless
    111   // of being enabled or disabled.  If a platform does support hot plug CPUs,
    112   // then this is the maximum number of CPUs that the platform supports.
    113   //
    114   UINT32                NumberOfCpus;
    115   //
    116   // Physical address of structure of type MTRR_SETTINGS that contains a copy
    117   // of the MTRR settings that are compatible with the MTRR settings used by
    118   // the boot processor when the platform was booted.  These MTRR settings are
    119   // used during an ACPI S3 resume.  This structure must be allocated below 4GB
    120   // from memory of type EfiACPIMemoryNVS.
    121   //
    122   EFI_PHYSICAL_ADDRESS  MtrrTable;
    123   //
    124   // Physical address of an array of CPU_REGISTER_TABLE structures, with
    125   // NumberOfCpus entries.  This array must be allocated below 4GB from memory
    126   // of type EfiACPIMemoryNVS.  If a register table is not required, then the
    127   // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.
    128   // If TableLength is > 0, then elements of RegisterTableEntry are used to
    129   // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,
    130   // before SMBASE relocation is performed.
    131   //
    132   EFI_PHYSICAL_ADDRESS  PreSmmInitRegisterTable;
    133   //
    134   // Physical address of an array of CPU_REGISTER_TABLE structures, with
    135   // NumberOfCpus entries.  This array must be allocated below 4GB from memory
    136   // of type EfiACPIMemoryNVS.  If a register table is not required, then the
    137   // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.
    138   // If TableLength is > 0, then elements of RegisterTableEntry are used to
    139   // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,
    140   // after SMBASE relocation is performed.
    141   //
    142   EFI_PHYSICAL_ADDRESS  RegisterTable;
    143   //
    144   // Physical address of a buffer that contains the machine check handler that
    145   // is used during an ACPI S3 Resume.  This buffer must be allocated below 4GB
    146   // from memory of type EfiACPIMemoryNVS.  In order for this machine check
    147   // handler to be active on an AP during an ACPI S3 resume, the machine check
    148   // vector in the IDT provided by IdtrProfile must be initialized to transfer
    149   // control to this physical address.
    150   //
    151   EFI_PHYSICAL_ADDRESS  ApMachineCheckHandlerBase;
    152   //
    153   // The size, in bytes, of the machine check handler that is used during an
    154   // ACPI S3 Resume.  If this field is 0, then a machine check handler is not
    155   // provided.
    156   //
    157   UINT32                ApMachineCheckHandlerSize;
    158 } ACPI_CPU_DATA;
    159 
    160 #endif
    161