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      1 /*
      2  * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
      3  *
      4  * SPDX-License-Identifier: BSD-3-Clause
      5  */
      6 #ifndef __COMMON_DEF_H__
      7 #define __COMMON_DEF_H__
      8 
      9 #include <bl_common.h>
     10 #include <platform_def.h>
     11 
     12 /******************************************************************************
     13  * Required platform porting definitions that are expected to be common to
     14  * all platforms
     15  *****************************************************************************/
     16 
     17 /*
     18  * Platform binary types for linking
     19  */
     20 #ifdef AARCH32
     21 #define PLATFORM_LINKER_FORMAT          "elf32-littlearm"
     22 #define PLATFORM_LINKER_ARCH            arm
     23 #else
     24 #define PLATFORM_LINKER_FORMAT          "elf64-littleaarch64"
     25 #define PLATFORM_LINKER_ARCH            aarch64
     26 #endif /* AARCH32 */
     27 
     28 /*
     29  * Generic platform constants
     30  */
     31 #define FIRMWARE_WELCOME_STR		"Booting Trusted Firmware\n"
     32 
     33 #if LOAD_IMAGE_V2
     34 #define BL2_IMAGE_DESC {				\
     35 	.image_id = BL2_IMAGE_ID,			\
     36 	SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,	\
     37 		VERSION_2, image_info_t, 0),		\
     38 	.image_info.image_base = BL2_BASE,		\
     39 	.image_info.image_max_size = BL2_LIMIT - BL2_BASE,\
     40 	SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,	\
     41 		VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),\
     42 	.ep_info.pc = BL2_BASE,				\
     43 }
     44 #else /* LOAD_IMAGE_V2 */
     45 #define BL2_IMAGE_DESC {				\
     46 	.image_id = BL2_IMAGE_ID,			\
     47 	SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,	\
     48 		VERSION_1, image_info_t, 0),		\
     49 	.image_info.image_base = BL2_BASE,		\
     50 	SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,	\
     51 		VERSION_1, entry_point_info_t, SECURE | EXECUTABLE),\
     52 	.ep_info.pc = BL2_BASE,				\
     53 }
     54 #endif /* LOAD_IMAGE_V2 */
     55 
     56 /*
     57  * The following constants identify the extents of the code & read-only data
     58  * regions. These addresses are used by the MMU setup code and therefore they
     59  * must be page-aligned.
     60  *
     61  * When the code and read-only data are mapped as a single atomic section
     62  * (i.e. when SEPARATE_CODE_AND_RODATA=0) then we treat the whole section as
     63  * code by specifying the read-only data section as empty.
     64  *
     65  * BL1 is different than the other images in the sense that its read-write data
     66  * originally lives in Trusted ROM and needs to be relocated in Trusted SRAM at
     67  * run-time. Therefore, the read-write data in ROM can be mapped with the same
     68  * memory attributes as the read-only data region. For this reason, BL1 uses
     69  * different macros.
     70  *
     71  * Note that BL1_ROM_END is not necessarily aligned on a page boundary as it
     72  * just points to the end of BL1's actual content in Trusted ROM. Therefore it
     73  * needs to be rounded up to the next page size in order to map the whole last
     74  * page of it with the right memory attributes.
     75  */
     76 #if SEPARATE_CODE_AND_RODATA
     77 #define BL_CODE_BASE		(unsigned long)(&__TEXT_START__)
     78 #define BL_CODE_END		(unsigned long)(&__TEXT_END__)
     79 #define BL_RO_DATA_BASE		(unsigned long)(&__RODATA_START__)
     80 #define BL_RO_DATA_END		(unsigned long)(&__RODATA_END__)
     81 
     82 #define BL1_CODE_END		BL_CODE_END
     83 #define BL1_RO_DATA_BASE	(unsigned long)(&__RODATA_START__)
     84 #define BL1_RO_DATA_END		round_up(BL1_ROM_END, PAGE_SIZE)
     85 #else
     86 #define BL_CODE_BASE		(unsigned long)(&__RO_START__)
     87 #define BL_CODE_END		(unsigned long)(&__RO_END__)
     88 #define BL_RO_DATA_BASE		0
     89 #define BL_RO_DATA_END		0
     90 
     91 #define BL1_CODE_END		round_up(BL1_ROM_END, PAGE_SIZE)
     92 #define BL1_RO_DATA_BASE	0
     93 #define BL1_RO_DATA_END		0
     94 #endif /* SEPARATE_CODE_AND_RODATA */
     95 
     96 /*
     97  * The next 2 constants identify the extents of the coherent memory region.
     98  * These addresses are used by the MMU setup code and therefore they must be
     99  * page-aligned.  It is the responsibility of the linker script to ensure that
    100  * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
    101  * page-aligned addresses.
    102  */
    103 #define BL_COHERENT_RAM_BASE	(unsigned long)(&__COHERENT_RAM_START__)
    104 #define BL_COHERENT_RAM_END	(unsigned long)(&__COHERENT_RAM_END__)
    105 
    106 #endif /* __COMMON_DEF_H__ */
    107