| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/UfsPciHcDxe/ |
| UfsPciHcDxe.h | 60 UINT8 BarIndex;
|
| UfsPciHcDxe.c | 47 0, // BarIndex
70 UINT8 BarIndex;
80 BarIndex = Private->BarIndex;
84 BarIndex,
316 UINT8 BarIndex;
320 BarIndex = Private->BarIndex;
322 Status = PciIo->Mem.Read (PciIo, (EFI_PCI_IO_PROTOCOL_WIDTH)Width, BarIndex, Offset, Count, Buffer);
358 UINT8 BarIndex;
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Include/Guid/ |
| GraphicsInfoHob.h | 45 UINT8 BarIndex; ///< Ignore if the value is 0xFF.
|
| /device/linaro/bootloader/edk2/CorebootPayloadPkg/Library/PlatformHookLib/ |
| PlatformHookLib.c | 27 UINT8 BarIndex; ///< Which BAR to get the UART base address
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Universal/Network/SnpDxe/ |
| Snp.c | 272 UINT8 BarIndex;
478 for (BarIndex = 0; BarIndex < PCI_MAX_BAR; BarIndex++) {
481 BarIndex,
492 Snp->MemoryBarIndex = BarIndex;
495 Snp->IoBarIndex = BarIndex;
|
| /device/linaro/bootloader/OpenPlatformPkg/Drivers/Block/DwUfsHcDxe/ |
| DwUfsHcDxe.c | 778 UINT8 BarIndex;
824 for (BarIndex = 0; BarIndex < PCI_MAX_BAR; BarIndex++) {
827 BarIndex,
838 Private->BarIndex = BarIndex;
[all...] |
| DwUfsHcDxe.h | 132 UINT8 BarIndex;
|
| /device/linaro/bootloader/edk2/DuetPkg/PciBusNoEnumerationDxe/ |
| PciEnumeratorSupport.c | 60 IN UINTN BarIndex
441 UINTN BarIndex;
468 for (Offset = 0x10, BarIndex = 0; Offset <= 0x24; BarIndex++) {
469 Offset = PciParseBar (PciIoDevice, Offset, BarIndex);
862 IN UINTN BarIndex
892 PciIoDevice->PciBar[BarIndex].BaseAddress = 0;
893 PciIoDevice->PciBar[BarIndex].Length = 0;
894 PciIoDevice->PciBar[BarIndex].Alignment = 0;
899 PciIoDevice->PciBar[BarIndex].Offset = (UINT8) Offset;
[all...] |
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/PciSioSerialDxe/ |
| Serial.c | 436 UINT8 BarIndex;
446 BarIndex = 0;
476 BarIndex = (PciSerialParameter->BarIndex == PCI_BAR_ALL) ? 0 : PciSerialParameter->BarIndex;
506 Status = ParentIo.PciIo->GetBarAttributes (ParentIo.PciIo, BarIndex, NULL, (VOID **) &Resources);
[all...] |
| Serial.h | 62 /// to support multiple UARTs, BarIndex of first instance equals to 0 and BarIndex of
64 /// UARTs, BarIndex of both instance equals to 0 and Offset of first instance equals
74 UINT8 BarIndex; ///< Which BAR to get the UART base address
|
| /device/linaro/bootloader/edk2/CorebootModulePkg/Library/BaseSerialPortLib16550/ |
| BaseSerialPortLib16550.c | 202 UINTN BarIndex;
308 for (BarIndex = 0; BarIndex < PCI_MAX_BAR; BarIndex ++) {
309 SerialRegisterBase = PciRead32 (PciLibAddress + PCI_BASE_ADDRESSREG_OFFSET + BarIndex * 4);
330 if (BarIndex == PCI_MAX_BAR) {
338 PciLibAddress + PCI_BASE_ADDRESSREG_OFFSET + BarIndex * 4,
[all...] |
| /device/linaro/bootloader/edk2/MdeModulePkg/Library/BaseSerialPortLib16550/ |
| BaseSerialPortLib16550.c | 202 UINTN BarIndex;
308 for (BarIndex = 0; BarIndex < PCI_MAX_BAR; BarIndex ++) {
309 SerialRegisterBase = PciRead32 (PciLibAddress + PCI_BASE_ADDRESSREG_OFFSET + BarIndex * 4);
330 if (BarIndex == PCI_MAX_BAR) {
338 PciLibAddress + PCI_BASE_ADDRESSREG_OFFSET + BarIndex * 4,
[all...] |
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ |
| PciEnumeratorSupport.c | 472 UINTN BarIndex;
499 for (Offset = 0x10, BarIndex = 0; Offset <= 0x24 && BarIndex < PCI_MAX_BAR; BarIndex++) {
500 Offset = PciParseBar (PciIoDevice, Offset, BarIndex);
507 for (Offset = PciIoDevice->SrIovCapabilityOffset + EFI_PCIE_CAPABILITY_ID_SRIOV_BAR0, BarIndex = 0;
509 BarIndex++) {
511 ASSERT (BarIndex < PCI_MAX_BAR);
512 Offset = PciIovParseVfBar (PciIoDevice, Offset, BarIndex);
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ |
| ntddndis.h | [all...] |
