/external/swiftshader/src/Shader/ |
PixelRoutine.hpp | 43 typedef Shader::DestinationParameter Dst;
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/external/llvm/include/llvm/Target/ |
CostTable.h | 46 MVT::SimpleValueType Dst; 55 int ISD, MVT Dst, MVT Src) { 59 Dst == Entry.Dst;
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/external/mesa3d/src/gallium/drivers/r300/compiler/ |
radeon_variable.h | 46 struct rc_dst_register Dst;
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/prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Target/ |
CostTable.h | 47 MVT::SimpleValueType Dst; 56 int ISD, MVT Dst, MVT Src) { 58 return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst;
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/prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/Target/ |
CostTable.h | 47 MVT::SimpleValueType Dst; 56 int ISD, MVT Dst, MVT Src) { 58 return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst;
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/prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/Target/ |
CostTable.h | 47 MVT::SimpleValueType Dst; 56 int ISD, MVT Dst, MVT Src) { 58 return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst;
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/prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/Target/ |
CostTable.h | 47 MVT::SimpleValueType Dst; 56 int ISD, MVT Dst, MVT Src) { 58 return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst;
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/prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/Target/ |
CostTable.h | 47 MVT::SimpleValueType Dst; 56 int ISD, MVT Dst, MVT Src) { 58 return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst;
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/prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/Target/ |
CostTable.h | 47 MVT::SimpleValueType Dst; 56 int ISD, MVT Dst, MVT Src) { 58 return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst;
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/prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/Target/ |
CostTable.h | 47 MVT::SimpleValueType Dst; 56 int ISD, MVT Dst, MVT Src) { 58 return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst;
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/prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Target/ |
CostTable.h | 47 MVT::SimpleValueType Dst; 56 int ISD, MVT Dst, MVT Src) { 58 return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst;
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/prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/Target/ |
CostTable.h | 47 MVT::SimpleValueType Dst; 56 int ISD, MVT Dst, MVT Src) { 58 return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst;
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/prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/Target/ |
CostTable.h | 47 MVT::SimpleValueType Dst; 56 int ISD, MVT Dst, MVT Src) { 58 return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst;
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/prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/Target/ |
CostTable.h | 47 MVT::SimpleValueType Dst; 56 int ISD, MVT Dst, MVT Src) { 58 return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst;
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/prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/Target/ |
CostTable.h | 47 MVT::SimpleValueType Dst; 56 int ISD, MVT Dst, MVT Src) { 58 return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst;
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/prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/Target/ |
CostTable.h | 47 MVT::SimpleValueType Dst; 56 int ISD, MVT Dst, MVT Src) { 58 return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst;
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/prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/Target/ |
CostTable.h | 47 MVT::SimpleValueType Dst; 56 int ISD, MVT Dst, MVT Src) { 58 return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst;
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/device/linaro/bootloader/edk2/MdeModulePkg/Universal/Network/Ip4Dxe/ |
Ip4Icmp.c | 109 IP4_ADDR Dst;
138 Dst = NTOHL (Icmp->IpHead.Dst);
140 CacheEntry = Ip4FindRouteCache (Ip4Instance->RouteTable, Dst, Src);
257 ReplyHead.Dst = Head->Src;
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/external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
AMDGPUAsmBackend.cpp | 105 uint16_t *Dst = (uint16_t*)(Data + Fixup.getOffset()); 106 *Dst = BrImm;
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/external/llvm/lib/Target/Lanai/ |
LanaiFrameLowering.cpp | 76 unsigned Dst = MI.getOperand(0).getReg(); 79 BuildMI(*MBB, MI, DL, LII.get(Lanai::ADD_I_LO), Dst)
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/external/swiftshader/third_party/LLVM/lib/CodeGen/AsmPrinter/ |
AsmPrinterDwarf.cpp | 213 const MachineLocation &Dst = Move.getDestination(); 217 if (Dst.isReg() && Dst.getReg() == MachineLocation::VirtualFP) { 226 assert(Dst.isReg() && "Machine move not supported yet."); 227 OutStreamer.EmitCFIDefCfaRegister(RI->getDwarfRegNum(Dst.getReg(), true)); 229 assert(!Dst.isReg() && "Machine move not supported yet."); 231 Dst.getOffset());
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/frameworks/av/media/libmedia/include/media/ |
convert.h | 193 typedef std::vector<DstElem> Dst; 195 static inline bool run(Src &src, Dst &dst) 198 dst.clear(); 199 dst.reserve(src.size()); 205 dst.push_back(dstElem);
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/external/libchrome/base/numerics/ |
safe_conversions.h | 52 template <typename Dst, typename Src> 54 return internal::DstRangeRelationToSrcRange<Dst>(value).IsValid(); 73 template <typename Dst, 76 constexpr Dst checked_cast(Src value) { 80 return IsValueInRangeForNumericType<Dst, SrcType>(value) 81 ? static_cast<Dst>(static_cast<SrcType>(value)) 82 : CheckHandler::template HandleFailure<Dst>(); 109 template <typename Dst, template <typename> class S, typename Src> 110 constexpr Dst saturated_cast_impl(Src value, RangeCheck constraint) { 114 ? (!constraint.IsUnderflowFlagSet() ? static_cast<Dst>(value [all...] |
/external/llvm/lib/Target/AMDGPU/ |
SILowerI1Copies.cpp | 95 const MachineOperand &Dst = MI.getOperand(0); 99 !TargetRegisterInfo::isVirtualRegister(Dst.getReg())) 102 const TargetRegisterClass *DstRC = MRI.getRegClass(Dst.getReg()); 107 I1Defs.push_back(Dst.getReg()); 113 I1Defs.push_back(Dst.getReg()); 119 .addOperand(Dst) 127 .addOperand(Dst) 135 .addOperand(Dst)
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/external/llvm/lib/Target/ARM/InstPrinter/ |
ARMInstPrinter.cpp | 80 const MCOperand &Dst = MI->getOperand(0); 90 printRegName(O, Dst.getReg()); 103 const MCOperand &Dst = MI->getOperand(0); 112 printRegName(O, Dst.getReg()); [all...] |