1 /* 2 * Copyright (c) 2011 Intel Corporation. All Rights Reserved. 3 * Copyright (c) Imagination Technologies Limited, UK 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial portions 15 * of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 20 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR 21 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 22 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 23 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 27 /*! 28 ****************************************************************************** 29 @file : ../firmware/msvdx/mtxlib/include/fwrk_msg_mem_io.h 30 31 @brief 32 33 @Author <Autogenerated> 34 35 <b>Description:</b>\n 36 This file contains the FWRK_MSG_MEM_IO_H Definitions. 37 38 <b>Platform:</b>\n 39 ? 40 41 @Version 42 1.0 43 44 ******************************************************************************/ 45 46 #if !defined (__FWRK_MSG_MEM_IO_H__) 47 #define __FWRK_MSG_MEM_IO_H__ 48 49 #ifdef __cplusplus 50 extern "C" { 51 #endif 52 53 54 #define FWRK_GENMSG_SIZE (2) 55 56 // FWRK_GENMSG SIZE 57 #define FWRK_GENMSG_SIZE_ALIGNMENT (1) 58 #define FWRK_GENMSG_SIZE_TYPE IMG_UINT8 59 #define FWRK_GENMSG_SIZE_MASK (0xFF) 60 #define FWRK_GENMSG_SIZE_LSBMASK (0xFF) 61 #define FWRK_GENMSG_SIZE_OFFSET (0x0000) 62 #define FWRK_GENMSG_SIZE_SHIFT (0) 63 64 // FWRK_GENMSG ID 65 #define FWRK_GENMSG_ID_ALIGNMENT (1) 66 #define FWRK_GENMSG_ID_TYPE IMG_UINT8 67 #define FWRK_GENMSG_ID_MASK (0xFF) 68 #define FWRK_GENMSG_ID_LSBMASK (0xFF) 69 #define FWRK_GENMSG_ID_OFFSET (0x0001) 70 #define FWRK_GENMSG_ID_SHIFT (0) 71 72 #define FWRK_PADMSG_SIZE (2) 73 74 // FWRK_PADMSG SIZE 75 #define FWRK_PADMSG_SIZE_ALIGNMENT (1) 76 #define FWRK_PADMSG_SIZE_TYPE IMG_UINT8 77 #define FWRK_PADMSG_SIZE_MASK (0xFF) 78 #define FWRK_PADMSG_SIZE_LSBMASK (0xFF) 79 #define FWRK_PADMSG_SIZE_OFFSET (0x0000) 80 #define FWRK_PADMSG_SIZE_SHIFT (0) 81 82 // FWRK_PADMSG ID 83 #define FWRK_PADMSG_ID_ALIGNMENT (1) 84 #define FWRK_PADMSG_ID_TYPE IMG_UINT8 85 #define FWRK_PADMSG_ID_MASK (0xFF) 86 #define FWRK_PADMSG_ID_LSBMASK (0xFF) 87 #define FWRK_PADMSG_ID_OFFSET (0x0001) 88 #define FWRK_PADMSG_ID_SHIFT (0) 89 90 #define FWRK_RSTMSG_SIZE (2) 91 92 // FWRK_RSTMSG SIZE 93 #define FWRK_RSTMSG_SIZE_ALIGNMENT (1) 94 #define FWRK_RSTMSG_SIZE_TYPE IMG_UINT8 95 #define FWRK_RSTMSG_SIZE_MASK (0xFF) 96 #define FWRK_RSTMSG_SIZE_LSBMASK (0xFF) 97 #define FWRK_RSTMSG_SIZE_OFFSET (0x0000) 98 #define FWRK_RSTMSG_SIZE_SHIFT (0) 99 100 // FWRK_RSTMSG ID 101 #define FWRK_RSTMSG_ID_ALIGNMENT (1) 102 #define FWRK_RSTMSG_ID_TYPE IMG_UINT8 103 #define FWRK_RSTMSG_ID_MASK (0xFF) 104 #define FWRK_RSTMSG_ID_LSBMASK (0xFF) 105 #define FWRK_RSTMSG_ID_OFFSET (0x0001) 106 #define FWRK_RSTMSG_ID_SHIFT (0) 107 108 #define FWRK_SRQMSG_SIZE (2) 109 110 // FWRK_SRQMSG SIZE 111 #define FWRK_SRQMSG_SIZE_ALIGNMENT (1) 112 #define FWRK_SRQMSG_SIZE_TYPE IMG_UINT8 113 #define FWRK_SRQMSG_SIZE_MASK (0xFF) 114 #define FWRK_SRQMSG_SIZE_LSBMASK (0xFF) 115 #define FWRK_SRQMSG_SIZE_OFFSET (0x0000) 116 #define FWRK_SRQMSG_SIZE_SHIFT (0) 117 118 // FWRK_SRQMSG ID 119 #define FWRK_SRQMSG_ID_ALIGNMENT (1) 120 #define FWRK_SRQMSG_ID_TYPE IMG_UINT8 121 #define FWRK_SRQMSG_ID_MASK (0xFF) 122 #define FWRK_SRQMSG_ID_LSBMASK (0xFF) 123 #define FWRK_SRQMSG_ID_OFFSET (0x0001) 124 #define FWRK_SRQMSG_ID_SHIFT (0) 125 126 #define FWRK_STAMSG_SIZE (3) 127 128 // FWRK_STAMSG SIZE 129 #define FWRK_STAMSG_SIZE_ALIGNMENT (1) 130 #define FWRK_STAMSG_SIZE_TYPE IMG_UINT8 131 #define FWRK_STAMSG_SIZE_MASK (0xFF) 132 #define FWRK_STAMSG_SIZE_LSBMASK (0xFF) 133 #define FWRK_STAMSG_SIZE_OFFSET (0x0000) 134 #define FWRK_STAMSG_SIZE_SHIFT (0) 135 136 // FWRK_STAMSG ID 137 #define FWRK_STAMSG_ID_ALIGNMENT (1) 138 #define FWRK_STAMSG_ID_TYPE IMG_UINT8 139 #define FWRK_STAMSG_ID_MASK (0xFF) 140 #define FWRK_STAMSG_ID_LSBMASK (0xFF) 141 #define FWRK_STAMSG_ID_OFFSET (0x0001) 142 #define FWRK_STAMSG_ID_SHIFT (0) 143 144 // FWRK_STAMSG IDLE 145 #define FWRK_STAMSG_IDLE_ALIGNMENT (1) 146 #define FWRK_STAMSG_IDLE_TYPE IMG_UINT8 147 #define FWRK_STAMSG_IDLE_MASK (0x01) 148 #define FWRK_STAMSG_IDLE_LSBMASK (0x01) 149 #define FWRK_STAMSG_IDLE_OFFSET (0x0002) 150 #define FWRK_STAMSG_IDLE_SHIFT (0) 151 152 // FWRK_STAMSG QUEUED_EVENTS 153 #define FWRK_STAMSG_QUEUED_EVENTS_ALIGNMENT (1) 154 #define FWRK_STAMSG_QUEUED_EVENTS_TYPE IMG_UINT8 155 #define FWRK_STAMSG_QUEUED_EVENTS_MASK (0x02) 156 #define FWRK_STAMSG_QUEUED_EVENTS_LSBMASK (0x01) 157 #define FWRK_STAMSG_QUEUED_EVENTS_OFFSET (0x0002) 158 #define FWRK_STAMSG_QUEUED_EVENTS_SHIFT (1) 159 160 #define FWRK_SPRMSG_SIZE (3) 161 162 // FWRK_SPRMSG SIZE 163 #define FWRK_SPRMSG_SIZE_ALIGNMENT (1) 164 #define FWRK_SPRMSG_SIZE_TYPE IMG_UINT8 165 #define FWRK_SPRMSG_SIZE_MASK (0xFF) 166 #define FWRK_SPRMSG_SIZE_LSBMASK (0xFF) 167 #define FWRK_SPRMSG_SIZE_OFFSET (0x0000) 168 #define FWRK_SPRMSG_SIZE_SHIFT (0) 169 170 // FWRK_SPRMSG ID 171 #define FWRK_SPRMSG_ID_ALIGNMENT (1) 172 #define FWRK_SPRMSG_ID_TYPE IMG_UINT8 173 #define FWRK_SPRMSG_ID_MASK (0xFF) 174 #define FWRK_SPRMSG_ID_LSBMASK (0xFF) 175 #define FWRK_SPRMSG_ID_OFFSET (0x0001) 176 #define FWRK_SPRMSG_ID_SHIFT (0) 177 178 // FWRK_SPRMSG PROF 179 #define FWRK_SPRMSG_PROF_ALIGNMENT (1) 180 #define FWRK_SPRMSG_PROF_TYPE IMG_UINT8 181 #define FWRK_SPRMSG_PROF_MASK (0xFF) 182 #define FWRK_SPRMSG_PROF_LSBMASK (0xFF) 183 #define FWRK_SPRMSG_PROF_OFFSET (0x0002) 184 #define FWRK_SPRMSG_PROF_SHIFT (0) 185 186 #define FWRK_PRRMSG_SIZE (3) 187 188 // FWRK_PRRMSG SIZE 189 #define FWRK_PRRMSG_SIZE_ALIGNMENT (1) 190 #define FWRK_PRRMSG_SIZE_TYPE IMG_UINT8 191 #define FWRK_PRRMSG_SIZE_MASK (0xFF) 192 #define FWRK_PRRMSG_SIZE_LSBMASK (0xFF) 193 #define FWRK_PRRMSG_SIZE_OFFSET (0x0000) 194 #define FWRK_PRRMSG_SIZE_SHIFT (0) 195 196 // FWRK_PRRMSG ID 197 #define FWRK_PRRMSG_ID_ALIGNMENT (1) 198 #define FWRK_PRRMSG_ID_TYPE IMG_UINT8 199 #define FWRK_PRRMSG_ID_MASK (0xFF) 200 #define FWRK_PRRMSG_ID_LSBMASK (0xFF) 201 #define FWRK_PRRMSG_ID_OFFSET (0x0001) 202 #define FWRK_PRRMSG_ID_SHIFT (0) 203 204 // FWRK_PRRMSG SUPPORTED 205 #define FWRK_PRRMSG_SUPPORTED_ALIGNMENT (1) 206 #define FWRK_PRRMSG_SUPPORTED_TYPE IMG_UINT8 207 #define FWRK_PRRMSG_SUPPORTED_MASK (0x01) 208 #define FWRK_PRRMSG_SUPPORTED_LSBMASK (0x01) 209 #define FWRK_PRRMSG_SUPPORTED_OFFSET (0x0002) 210 #define FWRK_PRRMSG_SUPPORTED_SHIFT (0) 211 212 #define FWRK_ERRMSG_SIZE (3) 213 214 // FWRK_ERRMSG SIZE 215 #define FWRK_ERRMSG_SIZE_ALIGNMENT (1) 216 #define FWRK_ERRMSG_SIZE_TYPE IMG_UINT8 217 #define FWRK_ERRMSG_SIZE_MASK (0xFF) 218 #define FWRK_ERRMSG_SIZE_LSBMASK (0xFF) 219 #define FWRK_ERRMSG_SIZE_OFFSET (0x0000) 220 #define FWRK_ERRMSG_SIZE_SHIFT (0) 221 222 // FWRK_ERRMSG ID 223 #define FWRK_ERRMSG_ID_ALIGNMENT (1) 224 #define FWRK_ERRMSG_ID_TYPE IMG_UINT8 225 #define FWRK_ERRMSG_ID_MASK (0xFF) 226 #define FWRK_ERRMSG_ID_LSBMASK (0xFF) 227 #define FWRK_ERRMSG_ID_OFFSET (0x0001) 228 #define FWRK_ERRMSG_ID_SHIFT (0) 229 230 // FWRK_ERRMSG ERROR 231 #define FWRK_ERRMSG_ERROR_ALIGNMENT (1) 232 #define FWRK_ERRMSG_ERROR_TYPE IMG_UINT8 233 #define FWRK_ERRMSG_ERROR_MASK (0xFF) 234 #define FWRK_ERRMSG_ERROR_LSBMASK (0xFF) 235 #define FWRK_ERRMSG_ERROR_OFFSET (0x0002) 236 #define FWRK_ERRMSG_ERROR_SHIFT (0) 237 238 #define FWRK_GBEMSG_SIZE (2) 239 240 // FWRK_GBEMSG SIZE 241 #define FWRK_GBEMSG_SIZE_ALIGNMENT (1) 242 #define FWRK_GBEMSG_SIZE_TYPE IMG_UINT8 243 #define FWRK_GBEMSG_SIZE_MASK (0xFF) 244 #define FWRK_GBEMSG_SIZE_LSBMASK (0xFF) 245 #define FWRK_GBEMSG_SIZE_OFFSET (0x0000) 246 #define FWRK_GBEMSG_SIZE_SHIFT (0) 247 248 // FWRK_GBEMSG ID 249 #define FWRK_GBEMSG_ID_ALIGNMENT (1) 250 #define FWRK_GBEMSG_ID_TYPE IMG_UINT8 251 #define FWRK_GBEMSG_ID_MASK (0xFF) 252 #define FWRK_GBEMSG_ID_LSBMASK (0xFF) 253 #define FWRK_GBEMSG_ID_OFFSET (0x0001) 254 #define FWRK_GBEMSG_ID_SHIFT (0) 255 256 #define FWRK_BENMSG_SIZE (8) 257 258 // FWRK_BENMSG SIZE 259 #define FWRK_BENMSG_SIZE_ALIGNMENT (1) 260 #define FWRK_BENMSG_SIZE_TYPE IMG_UINT8 261 #define FWRK_BENMSG_SIZE_MASK (0xFF) 262 #define FWRK_BENMSG_SIZE_LSBMASK (0xFF) 263 #define FWRK_BENMSG_SIZE_OFFSET (0x0000) 264 #define FWRK_BENMSG_SIZE_SHIFT (0) 265 266 // FWRK_BENMSG ID 267 #define FWRK_BENMSG_ID_ALIGNMENT (1) 268 #define FWRK_BENMSG_ID_TYPE IMG_UINT8 269 #define FWRK_BENMSG_ID_MASK (0xFF) 270 #define FWRK_BENMSG_ID_LSBMASK (0xFF) 271 #define FWRK_BENMSG_ID_OFFSET (0x0001) 272 #define FWRK_BENMSG_ID_SHIFT (0) 273 274 // FWRK_BENMSG ERRNUM 275 #define FWRK_BENMSG_ERRNUM_ALIGNMENT (4) 276 #define FWRK_BENMSG_ERRNUM_TYPE IMG_UINT32 277 #define FWRK_BENMSG_ERRNUM_MASK (0xFFFFFFFF) 278 #define FWRK_BENMSG_ERRNUM_LSBMASK (0xFFFFFFFF) 279 #define FWRK_BENMSG_ERRNUM_OFFSET (0x0004) 280 #define FWRK_BENMSG_ERRNUM_SHIFT (0) 281 282 #define FWRK_EXTMSG_SIZE (2) 283 284 // FWRK_EXTMSG SIZE 285 #define FWRK_EXTMSG_SIZE_ALIGNMENT (1) 286 #define FWRK_EXTMSG_SIZE_TYPE IMG_UINT8 287 #define FWRK_EXTMSG_SIZE_MASK (0xFF) 288 #define FWRK_EXTMSG_SIZE_LSBMASK (0xFF) 289 #define FWRK_EXTMSG_SIZE_OFFSET (0x0000) 290 #define FWRK_EXTMSG_SIZE_SHIFT (0) 291 292 // FWRK_EXTMSG ID 293 #define FWRK_EXTMSG_ID_ALIGNMENT (1) 294 #define FWRK_EXTMSG_ID_TYPE IMG_UINT8 295 #define FWRK_EXTMSG_ID_MASK (0xFF) 296 #define FWRK_EXTMSG_ID_LSBMASK (0xFF) 297 #define FWRK_EXTMSG_ID_OFFSET (0x0001) 298 #define FWRK_EXTMSG_ID_SHIFT (0) 299 300 301 302 #ifdef __cplusplus 303 } 304 #endif 305 306 #endif /* __FWRK_MSG_MEM_IO_H__ */ 307
