/external/swiftshader/third_party/LLVM/tools/llvm-objdump/ |
MCFunction.cpp | 35 std::vector<MCDecodedInst> Instructions; 57 Instructions.push_back(MCDecodedInst(Index, Size, Inst)); 92 std::sort(Instructions.begin(), Instructions.end()); 95 unsigned ii = 0, ie = Instructions.size(); 100 // Add instructions to the BB. 102 if (Instructions[ii].Address < *spi || 103 Instructions[ii].Address >= BlockEnd) 105 BB.addInst(Instructions[ii]);
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/external/v8/src/compiler/ |
move-optimizer.h | 23 typedef ZoneVector<Instruction*> Instructions;
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/external/llvm/include/llvm/MC/ |
MCWinEH.h | 45 std::vector<Instruction> Instructions;
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/external/swiftshader/third_party/LLVM/include/llvm/MC/ |
MCWin64EH.h | 68 Instructions() {} 79 std::vector<MCWin64EHInstruction> Instructions;
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/external/v8/tools/testrunner/local/ |
execution.py | 51 class Instructions(object): 114 return Instructions(command, test.id, timeout, context.verbose)
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/prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/MC/ |
MCWinEH.h | 45 std::vector<Instruction> Instructions;
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/prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/MC/ |
MCWinEH.h | 45 std::vector<Instruction> Instructions;
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/prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/MC/ |
MCWinEH.h | 45 std::vector<Instruction> Instructions;
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/prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/MC/ |
MCWinEH.h | 45 std::vector<Instruction> Instructions;
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/prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/MC/ |
MCWinEH.h | 45 std::vector<Instruction> Instructions;
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/prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/MC/ |
MCWinEH.h | 45 std::vector<Instruction> Instructions;
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/prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/MC/ |
MCWinEH.h | 45 std::vector<Instruction> Instructions;
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/prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/MC/ |
MCWinEH.h | 45 std::vector<Instruction> Instructions;
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/prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/MC/ |
MCWinEH.h | 45 std::vector<Instruction> Instructions;
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/prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/MC/ |
MCWinEH.h | 45 std::vector<Instruction> Instructions;
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/prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/MC/ |
MCWinEH.h | 45 std::vector<Instruction> Instructions;
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/prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/MC/ |
MCWinEH.h | 45 std::vector<Instruction> Instructions;
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/prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/MC/ |
MCWinEH.h | 45 std::vector<Instruction> Instructions;
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/prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/MC/ |
MCWinEH.h | 45 std::vector<Instruction> Instructions;
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/art/libdexfile/dex/ |
dex_instruction_iterator.h | 43 ALWAYS_INLINE const uint16_t* Instructions() const { 48 explicit DexInstructionPcPair(const uint16_t* instructions, uint32_t dex_pc) 49 : instructions_(instructions), dex_pc_(dex_pc) {} 79 // Instructions from the start of the code item. 80 ALWAYS_INLINE const uint16_t* Instructions() const { 81 return data_.Instructions(); 90 DCHECK_EQ(lhs.Instructions(), rhs.Instructions()) << "Comparing different code items."; 101 DCHECK_EQ(lhs.Instructions(), rhs.Instructions()) << "Comparing different code items." [all...] |
/external/llvm/lib/DebugInfo/DWARF/ |
DWARFDebugFrame.cpp | 44 /// \brief Parse and store a sequence of CFI instructions from Data, 54 /// \brief Dump the entry's instructions to the given output stream. 66 /// An entry may contain CFI instructions. An instruction consists of an 78 std::vector<Instruction> Instructions; 81 /// operands to the Instructions vector. 83 Instructions.push_back(Instruction(Opcode)); 87 Instructions.push_back(Instruction(Opcode)); 88 Instructions.back().Ops.push_back(Operand1); 92 Instructions.push_back(Instruction(Opcode)); 93 Instructions.back().Ops.push_back(Operand1) [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64AddressTypePromotion.cpp | 37 #include "llvm/IR/Instructions.h" 84 // sext instructions. 103 typedef SmallVector<Instruction *, 16> Instructions; 104 typedef DenseMap<Value *, Instructions> ValueToInsts; 121 /// Move sext operations through safe to sext instructions. 122 bool propagateSignExtension(Instructions &SExtInsts); 136 void analyzeSExtension(Instructions &SExtInsts); 226 // - SExtInsts contains all the sext instructions that are used directly in 251 AArch64AddressTypePromotion::propagateSignExtension(Instructions &SExtInsts) { 344 // If more sext are required, new instructions will have to be created [all...] |
/external/llvm/lib/Target/AMDGPU/ |
SIWholeQuadMode.cpp | 11 /// \brief This pass adds instructions to enable whole quad mode for pixel 26 /// instructions by 33 /// instructions, the pass first analyzes which instructions must be run in WQM 34 /// (aka which instructions produce values that lead to derivative 46 /// consist of exact and don't-care instructions, the switch only has to 98 DenseMap<const MachineInstr *, InstrInfo> Instructions; 147 // Scan instructions to determine which ones require an Exact execmask and 167 // Handle export instructions with the exec mask valid flag set 195 Instructions[&MI].Needs = Flags [all...] |
/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
HexagonMCCodeEmitter.cpp | 33 STATISTIC(MCNumEmitted, "Number of MC instructions emitted"); 112 // Compound instructions are limited to using registers 0-7 and 16-23 118 // Pseudo instructions don't get encoded and shouldn't be here 145 auto Instructions = HexagonMCInstrInfo::bundleInstructions(**CurrentBundle); 146 auto i = Instructions.begin() + Index - 1; 148 assert(i != Instructions.begin() - 1 && "Couldn't find producer"); 154 // Vector instructions don't count scalars 187 // Check for unimplemented instructions. Immediate extenders
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/external/llvm/utils/TableGen/ |
CodeGenTarget.h | 69 std::unique_ptr<CodeGenInstruction>> Instructions; 150 if (Instructions.empty()) ReadInstructions(); 151 return Instructions; 156 if (Instructions.empty()) ReadInstructions(); 157 auto I = Instructions.find(InstRec); 158 assert(I != Instructions.end() && "Not an instruction"); 162 /// getInstructionsByEnumValue - Return all of the instructions defined by the 180 /// encodings, reverse the bit order of all instructions.
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