/external/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsNaClELFStreamer.cpp | 150 bool IsStore; 152 &IsStore); 158 bool MaskAfter = IsSPFirstOperand && !IsStore; 203 bool *IsStore) { 204 if (IsStore) 205 *IsStore = false; 235 if (IsStore) 236 *IsStore = true; 243 if (IsStore) 244 *IsStore = true [all...] |
/external/v8/src/arm64/ |
instructions-arm64.cc | 43 bool Instruction::IsStore() const {
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/art/compiler/optimizing/ |
load_store_elimination.cc | 274 static bool IsStore(HInstruction* instruction) { 290 if (!IsStore(heap_value)) { 313 if (!IsStore(heap_value)) { 416 if (!IsStore(pred_value)) { 463 } else if (!IsStore(merged_value)) { 595 DCHECK(!IsStore(value)) << value->DebugName(); 620 DCHECK(!IsStore(value)) << value->DebugName(); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCVSXSwapRemoval.cpp | 79 unsigned int IsStore : 1; 366 SwapVector[VecIdx].IsStore = 1; 372 SwapVector[VecIdx].IsStore = 1; 675 SwapVector[UseIdx].IsStore) { 691 } else if (SwapVector[EntryIdx].IsStore && SwapVector[EntryIdx].IsSwap) { 699 SwapVector[DefIdx].IsStore) { 764 } else if (SwapVector[EntryIdx].IsStore && SwapVector[EntryIdx].IsSwap) { [all...] |
/external/vixl/src/aarch64/ |
instructions-aarch64.cc | 97 bool Instruction::IsStore() const {
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/external/llvm/lib/Target/AMDGPU/ |
SIRegisterInfo.cpp | 426 bool IsStore = MI->mayStore(); 469 unsigned SrcDstRegState = getDefRegState(!IsStore); 477 .addReg(SubReg, getDefRegState(!IsStore)) [all...] |
/external/llvm/lib/Target/ARM/ |
ARMLoadStoreOptimizer.cpp | 472 bool IsStore = 475 if (IsLoad || IsStore) { 488 if (Offset >= 0 && !(IsStore && InstrSrcReg == Base)) [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonExpandCondsets.cpp | 821 bool IsLoad = TheI.mayLoad(), IsStore = TheI.mayStore(); 822 if (!IsLoad && !IsStore) 844 bool Conflict = (L && IsStore) || S; [all...] |
/external/llvm/lib/Transforms/Instrumentation/ |
EfficiencySanitizer.cpp | 196 bool instrumentFastpath(Instruction *I, const DataLayout &DL, bool IsStore, 650 bool IsStore; 654 IsStore = false; 658 IsStore = true; 662 IsStore = true; 666 IsStore = true; 680 if (IsStore) 686 OnAccessFunc = IsStore ? EsanUnalignedStoreN : EsanUnalignedLoadN; 692 instrumentFastpath(I, DL, IsStore, Addr, Alignment)) { 697 OnAccessFunc = IsStore ? EsanAlignedStore[Idx] : EsanAlignedLoad[Idx] [all...] |
/external/clang/lib/CodeGen/ |
CGAtomic.cpp | [all...] |
/external/llvm/lib/CodeGen/ |
AtomicExpandPass.cpp | 51 bool IsStore, bool IsLoad); 227 bool IsStore, IsLoad; 231 IsStore = false; 236 IsStore = true; 242 IsStore = IsLoad = true; 253 IsStore = IsLoad = true; 257 MadeChange |= bracketInstWithFences(I, FenceOrdering, IsStore, IsLoad); 324 bool IsStore, bool IsLoad) { 327 auto LeadingFence = TLI->emitLeadingFence(Builder, Order, IsStore, IsLoad); 329 auto TrailingFence = TLI->emitTrailingFence(Builder, Order, IsStore, IsLoad) [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | [all...] |