1 /* 2 * Copyright (C) 2016-2017 STMicroelectronics 3 * 4 * Author: Denis Ciocca <denis.ciocca (at) st.com> 5 * 6 * Licensed under the Apache License, Version 2.0 (the "License"); 7 * you may not use this file except in compliance with the License. 8 * You may obtain a copy of the License at 9 * 10 * http://www.apache.org/licenses/LICENSE-2.0 11 * 12 * Unless required by applicable law or agreed to in writing, software 13 * distributed under the License is distributed on an "AS IS" BASIS, 14 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 * See the License for the specific language governing permissions and 16 * limitations under the License. 17 */ 18 19 #ifndef __LSM6DSM_I2C_MASTER_LIS3MDL__ 20 #define __LSM6DSM_I2C_MASTER_LIS3MDL__ 21 22 #ifdef LSM6DSM_I2C_MASTER_LIS3MDL 23 #ifndef LSM6DSM_I2C_MASTER_MAGNETOMETER_ENABLED 24 #define LSM6DSM_I2C_MASTER_MAGNETOMETER_ENABLED 1 25 #else /* LSM6DSM_I2C_MASTER_MAGNETOMETER_ENABLED */ 26 #error "Another magnetometer is already selected! One magn per time can be used." 27 #endif /* LSM6DSM_I2C_MASTER_MAGNETOMETER_ENABLED */ 28 29 #if !defined(LSM6DSM_LIS3MDL_I2C_ADDRESS) 30 #error "LIS3MDL i2c address macro not defined. Please check README file" 31 #endif /* LSM6DSM_LIS3MDL_I2C_ADDRESS */ 32 33 #else /* LSM6DSM_I2C_MASTER_LIS3MDL */ 34 #undef LSM6DSM_LIS3MDL_I2C_ADDRESS 35 #define LSM6DSM_LIS3MDL_I2C_ADDRESS 1 36 #endif /* LSM6DSM_I2C_MASTER_LIS3MDL */ 37 38 #define LIS3MDL_KSCALE 0.043840420868f /* MAGN scale @12G in uT/LSB */ 39 #define LIS3MDL_I2C_ADDRESS (LSM6DSM_LIS3MDL_I2C_ADDRESS) 40 41 /* LIS3MDL registers */ 42 #define LIS3MDL_WAI_ADDR (0x0f) 43 #define LIS3MDL_CTRL1_ADDR (0x20) 44 #define LIS3MDL_CTRL2_ADDR (0x21) 45 #define LIS3MDL_CTRL3_ADDR (0x22) 46 #define LIS3MDL_CTRL4_ADDR (0x23) 47 #define LIS3MDL_CTRL5_ADDR (0x24) 48 #define LIS3MDL_OUTDATA_ADDR (0x28) 49 50 #define LIS3MDL_SW_RESET (0x04) 51 #define LIS3MDL_POWER_ON_VALUE (0x00) 52 #define LIS3MDL_POWER_OFF_VALUE (0x03) 53 #define LIS3MDL_OUTDATA_LEN (0x06) 54 #define LIS3MDL_ENABLE_SELFTEST (0x01) 55 56 /* Selftest related */ 57 #define LIS3MDL_SELFTEST_HIGH_THR_XY_LSB 6843 58 #define LIS3MDL_SELFTEST_HIGH_THR_Z_LSB 2281 59 #define LIS3MDL_SELFTEST_LOW_THR_XY_LSB 2281 60 #define LIS3MDL_SELFTEST_LOW_THR_Z_LSB 228 61 62 63 /* LIS3MDL default base registers status */ 64 /* LIS3MDL_CTRL1_BASE: control register 1 default settings */ 65 #define LIS3MDL_CTRL1_BASE ((0 << 7) | /* TEMP_EN */ \ 66 (1 << 6) | /* OM1 */ \ 67 (1 << 5) | /* OM0 */ \ 68 (0 << 4) | /* DO2 */ \ 69 (0 << 3) | /* DO1 */ \ 70 (0 << 2) | /* DO0 */ \ 71 (0 << 1) | /* FAST_ODR */ \ 72 (0 << 0)) /* ST */ 73 74 /* LIS3MDL_CTRL2_BASE: control register 2 default settings */ 75 #define LIS3MDL_CTRL2_BASE ((0 << 7) | /* (0) */ \ 76 (1 << 6) | /* FS1 */ \ 77 (0 << 5) | /* FS0 */ \ 78 (0 << 4) | /* (0) */ \ 79 (0 << 3) | /* REBOOT */ \ 80 (0 << 2) | /* SOFT_RST */ \ 81 (0 << 1) | /* (0) */ \ 82 (0 << 0)) /* (0) */ 83 84 /* LIS3MDL_CTRL3_BASE: control register 3 default settings */ 85 #define LIS3MDL_CTRL3_BASE (0x00) 86 87 /* LIS3MDL_CTRL4_BASE: control register 4 default settings */ 88 #define LIS3MDL_CTRL4_BASE ((0 << 7) | /* (0) */ \ 89 (0 << 6) | /* (0) */ \ 90 (0 << 5) | /* (0) */ \ 91 (0 << 4) | /* (0) */ \ 92 (1 << 3) | /* OMZ1 */ \ 93 (1 << 2) | /* OMZ0 */ \ 94 (0 << 1) | /* BLE */ \ 95 (0 << 0)) /* (0) */ 96 97 /* LIS3MDL_CTRL5_BASE: control register 5 default settings */ 98 #define LIS3MDL_CTRL5_BASE ((0 << 7) | /* FAST_READ */ \ 99 (1 << 6) | /* BDU */ \ 100 (0 << 5) | /* (0) */ \ 101 (0 << 4) | /* (0) */ \ 102 (0 << 3) | /* (0) */ \ 103 (0 << 2) | /* (0) */ \ 104 (0 << 1) | /* (0) */ \ 105 (0 << 0)) /* (0) */ 106 107 #ifdef LSM6DSM_I2C_MASTER_LIS3MDL 108 /* MUST BE SAME LENGTH OF LSM6DSMMagnRates */ 109 static uint8_t LIS3MDLMagnRatesRegValue[] = { 110 0x0c, /* Expected 0.8125Hz, ODR = 5Hz */ 111 0x0c, /* Expected 1.625Hz, ODR = 5Hz */ 112 0x0c, /* Expected 3.25Hz, ODR = 5Hz */ 113 0x10, /* Expected 6.5Hz, ODR = 10Hz */ 114 0x14, /* Expected 12.5Hz, ODR = 20Hz */ 115 0x18, /* Expected 26Hz, ODR = 40Hz */ 116 0x1c, /* Expected 52Hz, ODR = 80Hz */ 117 0x1c, /* Expected 104Hz, ODR = 80Hz */ 118 }; 119 #endif /* LSM6DSM_I2C_MASTER_LIS3MDL */ 120 121 #endif /* __LSM6DSM_I2C_MASTER_LIS3MDL__ */ 122
