1 /** @file 2 Main Header file for the MMC DXE driver 3 4 Copyright (c) 2011-2015, ARM Limited. All rights reserved. 5 6 This program and the accompanying materials 7 are licensed and made available under the terms and conditions of the BSD License 8 which accompanies this distribution. The full text of the license may be found at 9 http://opensource.org/licenses/bsd-license.php 10 11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 14 **/ 15 16 #ifndef __MMC_H 17 #define __MMC_H 18 19 #include <Uefi.h> 20 21 #include <Protocol/DiskIo.h> 22 #include <Protocol/BlockIo.h> 23 #include <Protocol/EraseBlock.h> 24 #include <Protocol/DevicePath.h> 25 #include <Protocol/MmcHost.h> 26 27 #include <Library/UefiLib.h> 28 #include <Library/DebugLib.h> 29 #include <Library/UefiBootServicesTableLib.h> 30 31 #define MMC_TRACE(txt) DEBUG((EFI_D_BLKIO, "MMC: " txt "\n")) 32 33 #define MMC_IOBLOCKS_READ 0 34 #define MMC_IOBLOCKS_WRITE 1 35 36 #define MMC_OCR_POWERUP 0x80000000 37 38 #define MMC_OCR_ACCESS_MASK 0x3 /* bit[30-29] */ 39 #define MMC_OCR_ACCESS_BYTE 0x1 /* bit[29] */ 40 #define MMC_OCR_ACCESS_SECTOR 0x2 /* bit[30] */ 41 42 #define MMC_CSD_GET_CCC(Response) (Response[2] >> 20) 43 #define MMC_CSD_GET_TRANSPEED(Response) (Response[3] & 0xFF) 44 #define MMC_CSD_GET_READBLLEN(Response) ((Response[2] >> 16) & 0xF) 45 #define MMC_CSD_GET_WRITEBLLEN(Response) ((Response[0] >> 22) & 0xF) 46 #define MMC_CSD_GET_FILEFORMAT(Response) ((Response[0] >> 10) & 0x3) 47 #define MMC_CSD_GET_FILEFORMATGRP(Response) ((Response[0] >> 15) & 0x1) 48 #define MMC_CSD_GET_DEVICESIZE(csd) (((Response[1] >> 30) & 0x3) | ((Response[2] & 0x3FF) << 2)) 49 #define HC_MMC_CSD_GET_DEVICESIZE(Response) ((Response[1] >> 16) | ((Response[2] & 0x40) << 16)); 50 #define MMC_CSD_GET_DEVICESIZEMULT(csd) ((Response[1] >> 15) & 0x7) 51 52 #define MMC_R0_READY_FOR_DATA (1 << 8) 53 54 #define MMC_R0_CURRENTSTATE(Response) ((Response[0] >> 9) & 0xF) 55 56 #define MMC_R0_STATE_IDLE 0 57 #define MMC_R0_STATE_READY 1 58 #define MMC_R0_STATE_IDENT 2 59 #define MMC_R0_STATE_STDBY 3 60 #define MMC_R0_STATE_TRAN 4 61 #define MMC_R0_STATE_DATA 5 62 63 #define EMMC_CMD6_ARG_ACCESS(x) (((x) & 0x3) << 24) 64 #define EMMC_CMD6_ARG_INDEX(x) (((x) & 0xFF) << 16) 65 #define EMMC_CMD6_ARG_VALUE(x) (((x) & 0xFF) << 8) 66 #define EMMC_CMD6_ARG_CMD_SET(x) (((x) & 0x7) << 0) 67 68 typedef enum { 69 UNKNOWN_CARD, 70 MMC_CARD, //MMC card 71 MMC_CARD_HIGH, //MMC Card with High capacity 72 EMMC_CARD, //eMMC 4.41 card 73 SD_CARD, //SD 1.1 card 74 SD_CARD_2, //SD 2.0 or above standard card 75 SD_CARD_2_HIGH //SD 2.0 or above high capacity card 76 } CARD_TYPE; 77 78 typedef struct { 79 UINT32 Reserved0: 7; // 0 80 UINT32 V170_V195: 1; // 1.70V - 1.95V 81 UINT32 V200_V260: 7; // 2.00V - 2.60V 82 UINT32 V270_V360: 9; // 2.70V - 3.60V 83 UINT32 RESERVED_1: 5; // Reserved 84 UINT32 AccessMode: 2; // 00b (byte mode), 10b (sector mode) 85 UINT32 PowerUp: 1; // This bit is set to LOW if the card has not finished the power up routine 86 } OCR; 87 88 typedef struct { 89 UINT8 SD_SPEC: 4; // SD Memory Card - Spec. Version [59:56] 90 UINT8 SCR_STRUCTURE: 4; // SCR Structure [63:60] 91 UINT8 SD_BUS_WIDTHS: 4; // DAT Bus widths supported [51:48] 92 UINT8 DATA_STAT_AFTER_ERASE: 1; // Data Status after erases [55] 93 UINT8 SD_SECURITY: 3; // CPRM Security Support [54:52] 94 UINT8 EX_SECURITY_1: 1; // Extended Security Support [43] 95 UINT8 SD_SPEC4: 1; // Spec. Version 4.00 or higher [42] 96 UINT8 RESERVED_1: 2; // Reserved [41:40] 97 UINT8 SD_SPEC3: 1; // Spec. Version 3.00 or higher [47] 98 UINT8 EX_SECURITY_2: 3; // Extended Security Support [46:44] 99 UINT8 CMD_SUPPORT: 4; // Command Support bits [35:32] 100 UINT8 RESERVED_2: 4; // Reserved [39:36] 101 UINT32 RESERVED_3; // Manufacturer Usage [31:0] 102 } SCR; 103 104 typedef struct { 105 UINT32 NOT_USED; // 1 [0:0] 106 UINT32 CRC; // CRC7 checksum [7:1] 107 UINT32 MDT; // Manufacturing date [19:8] 108 UINT32 RESERVED_1; // Reserved [23:20] 109 UINT32 PSN; // Product serial number [55:24] 110 UINT8 PRV; // Product revision [63:56] 111 UINT8 PNM[5]; // Product name [64:103] 112 UINT16 OID; // OEM/Application ID [119:104] 113 UINT8 MID; // Manufacturer ID [127:120] 114 } CID; 115 116 typedef struct { 117 UINT8 NOT_USED: 1; // Not used, always 1 [0:0] 118 UINT8 CRC: 7; // CRC [7:1] 119 120 UINT8 RESERVED_1: 2; // Reserved [9:8] 121 UINT8 FILE_FORMAT: 2; // File format [11:10] 122 UINT8 TMP_WRITE_PROTECT: 1; // Temporary write protection [12:12] 123 UINT8 PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13] 124 UINT8 COPY: 1; // Copy flag (OTP) [14:14] 125 UINT8 FILE_FORMAT_GRP: 1; // File format group [15:15] 126 127 UINT16 RESERVED_2: 5; // Reserved [20:16] 128 UINT16 WRITE_BL_PARTIAL: 1; // Partial blocks for write allowed [21:21] 129 UINT16 WRITE_BL_LEN: 4; // Max. write data block length [25:22] 130 UINT16 R2W_FACTOR: 3; // Write speed factor [28:26] 131 UINT16 RESERVED_3: 2; // Reserved [30:29] 132 UINT16 WP_GRP_ENABLE: 1; // Write protect group enable [31:31] 133 134 UINT32 WP_GRP_SIZE: 7; // Write protect group size [38:32] 135 UINT32 SECTOR_SIZE: 7; // Erase sector size [45:39] 136 UINT32 ERASE_BLK_EN: 1; // Erase single block enable [46:46] 137 UINT32 C_SIZE_MULT: 3; // Device size multiplier [49:47] 138 UINT32 VDD_W_CURR_MAX: 3; // Max. write current @ VDD max [52:50] 139 UINT32 VDD_W_CURR_MIN: 3; // Max. write current @ VDD min [55:53] 140 UINT32 VDD_R_CURR_MAX: 3; // Max. read current @ VDD max [58:56] 141 UINT32 VDD_R_CURR_MIN: 3; // Max. read current @ VDD min [61:59] 142 UINT32 C_SIZELow2: 2; // Device size [63:62] 143 144 UINT32 C_SIZEHigh10: 10;// Device size [73:64] 145 UINT32 RESERVED_4: 2; // Reserved [75:74] 146 UINT32 DSR_IMP: 1; // DSR implemented [76:76] 147 UINT32 READ_BLK_MISALIGN: 1; // Read block misalignment [77:77] 148 UINT32 WRITE_BLK_MISALIGN: 1; // Write block misalignment [78:78] 149 UINT32 READ_BL_PARTIAL: 1; // Partial blocks for read allowed [79:79] 150 UINT32 READ_BL_LEN: 4; // Max. read data block length [83:80] 151 UINT32 CCC: 12;// Card command classes [95:84] 152 153 UINT8 TRAN_SPEED ; // Max. bus clock frequency [103:96] 154 UINT8 NSAC ; // Data read access-time 2 in CLK cycles (NSAC*100) [111:104] 155 UINT8 TAAC ; // Data read access-time 1 [119:112] 156 157 UINT8 RESERVED_5: 2; // Reserved [121:120] 158 UINT8 SPEC_VERS: 4; // System specification version [125:122] 159 UINT8 CSD_STRUCTURE: 2; // CSD structure [127:126] 160 } CSD; 161 162 typedef struct { 163 UINT8 RESERVED_1[16]; // Reserved [15:0] 164 UINT8 SECURE_REMOVAL_TYPE; // Secure Removal Type [16:16] 165 UINT8 PRODUCT_STATE_AWARENESS_ENABLEMENT; // Product state awareness enablement [17:17] 166 UINT8 MAX_PRE_LOADING_DATA_SIZE[4]; // MAX pre loading data size [21:18] 167 UINT8 PRE_LOADING_DATA_SIZE[4]; // Pre loading data size [25:22] 168 UINT8 FFU_STATUS; // FFU Status [26:26] 169 UINT8 RESERVED_2[2]; // Reserved [28:27] 170 UINT8 MODE_OPERATION_CODES; // Mode operation codes [29:29] 171 UINT8 MODE_CONFIG; // Mode config [30:30] 172 UINT8 RESERVED_3; // Reserved [31:31] 173 UINT8 FLUSH_CACHE; // Flushing of the cache [32:32] 174 UINT8 CACHE_CTRL; // Control to turn the cache ON/OFF [33:33] 175 UINT8 POWER_OFF_NOTIFICATION; // Power Off Notification [34:34] 176 UINT8 PACKED_FAILURE_INDEX; // Packed command failure index [35:35] 177 UINT8 PACKED_COMMAND_STATUS; // Packed command status [36:36] 178 UINT8 CONTEXT_CONF[15]; // Context configuration [51:37] 179 UINT8 EXT_PARTITIONS_ATTRIBUTE[2]; // Extended partitions attribute [53:52] 180 UINT8 EXCEPTION_EVENTS_STATUS[2]; // Exception events status [55:54] 181 UINT8 EXCEPTION_EVENTS_CTRL[2]; // Exception events control [57:56] 182 UINT8 DYNCAP_NEEDED; // Number of addressed group to be released [58:58] 183 UINT8 CLASS_6_CTRL; // Class 6 commands control [59:59] 184 UINT8 INI_TIMEOUT_EMU; // 1st initialization after disabling sector size emulation [60:60] 185 UINT8 DATA_SECTOR_SIZE; // Sector size [61:61] 186 UINT8 USE_NATIVE_SECTOR; // Sector size emulation [62:62] 187 UINT8 NATIVE_SECTOR_SIZE; // Native sector size [63:63] 188 UINT8 VENDOR_SPECIFIC_FIELD[64]; // Vendor specific fields [127:64] 189 UINT8 RESERVED_4[2]; // Reserved [129:128] 190 UINT8 PROGRAM_CID_CSD_DDR_SUPPORT; // Program CID/CSD in DDR mode support [130:130] 191 UINT8 PERIODIC_WAKEUP; // Periodic wake-up [131:131] 192 UINT8 TCASE_SUPPORT; // Package case temperature is controlled [132:132] 193 UINT8 PRODUCTION_STATE_AWARENESS; // Production state awareness [133:133] 194 UINT8 SECTOR_BAD_BLK_MGMNT; // Bad block management mode [134:134] 195 UINT8 RESERVED_5; // Reserved [135:135] 196 UINT8 ENH_START_ADDR[4]; // Enhanced user data start address [139:136] 197 UINT8 ENH_SIZE_MULT[3]; // Enhanced user data area size [142:140] 198 UINT8 GP_SIZE_MULT[12]; // General purpose partition size [154:143] 199 UINT8 PARTITION_SETTING_COMPLETED; // Partitioning setting [155:155] 200 UINT8 PARTITIONS_ATTRIBUTE; // Partitions attribute [156:156] 201 UINT8 MAX_ENH_SIZE_MULT[3]; // Max enhanced area size [159:157] 202 UINT8 PARTITIONING_SUPPORT; // Partitioning [160:160] 203 UINT8 HPI_MGMT; // HPI management [161:161] 204 UINT8 RST_N_FUNCTION; // H/W reset function [162:162] 205 UINT8 BKOPS_EN; // Enable background operations handshake [163:163] 206 UINT8 BKOPS_START; // Manually start background operations [164:164] 207 UINT8 SANITIZE_START; // Start sanitize operation [165:165] 208 UINT8 WR_REL_PARAM; // Write reliability parameter register [166:166] 209 UINT8 WR_REL_SET; // Write reliability setting register [167:167] 210 UINT8 RPMB_SIZE_MULT; // RPMB size [168:168] 211 UINT8 FW_CONFIG; // FW configuration [169:169] 212 UINT8 RESERVED_6; // Reserved [170:170] 213 UINT8 USER_WP; // User area write protection register [171:171] 214 UINT8 RESERVED_7; // Reserved [172:172] 215 UINT8 BOOT_WP; // Boot area write protection register [173:173] 216 UINT8 BOOT_WP_STATUS; // Boot write protection register [174:174] 217 UINT8 ERASE_GROUP_DEF; // High-density erase group definition [175:175] 218 UINT8 RESERVED_8; // Reserved [176:176] 219 UINT8 BOOT_BUS_CONDITIONS; // Boot bus conditions [177:177] 220 UINT8 BOOT_CONFIG_PROT; // Boot config protection [178:178] 221 UINT8 PARTITION_CONFIG; // Partition config [179:179] 222 UINT8 RESERVED_9; // Reserved [180:180] 223 UINT8 ERASED_MEM_CONT; // Erased memory content [181:181] 224 UINT8 RESERVED_10; // Reserved [182:182] 225 UINT8 BUS_WIDTH; // Bus width mode [183:183] 226 UINT8 RESERVED_11; // Reserved [184:184] 227 UINT8 HS_TIMING; // High-speed interface timing [185:185] 228 UINT8 RESERVED_12; // Reserved [186:186] 229 UINT8 POWER_CLASS; // Power class [187:187] 230 UINT8 RESERVED_13; // Reserved [188:188] 231 UINT8 CMD_SET_REV; // Command set revision [189:189] 232 UINT8 RESERVED_14; // Reserved [190:190] 233 UINT8 CMD_SET; // Command set [191:191] 234 UINT8 EXT_CSD_REV; // Extended CSD revision [192:192] 235 UINT8 RESERVED_15; // Reserved [193:193] 236 UINT8 CSD_STRUCTURE; // CSD Structure [194:194] 237 UINT8 RESERVED_16; // Reserved [195:195] 238 UINT8 DEVICE_TYPE; // Device type [196:196] 239 UINT8 DRIVER_STRENGTH; // I/O Driver strength [197:197] 240 UINT8 OUT_OF_INTERRUPT_TIME; // Out-of-interrupt busy timing [198:198] 241 UINT8 PARTITION_SWITCH_TIME; // Partition switching timing [199:199] 242 UINT8 PWR_CL_52_195; // Power class for 52MHz at 1.95V 1 R [200:200] 243 UINT8 PWR_CL_26_195; // Power class for 26MHz at 1.95V 1 R [201:201] 244 UINT8 PWR_CL_52_360; // Power class for 52MHz at 3.6V 1 R [202:202] 245 UINT8 PWR_CL_26_360; // Power class for 26MHz at 3.6V 1 R [203:203] 246 UINT8 RESERVED_17; // Reserved [204:204] 247 UINT8 MIN_PERF_R_4_26; // Minimum read performance for 4bit at 26MHz [205:205] 248 UINT8 MIN_PERF_W_4_26; // Minimum write performance for 4bit at 26MHz [206:206] 249 UINT8 MIN_PERF_R_8_26_4_52; // Minimum read performance for 8bit at 26MHz, for 4bit at 52MHz [207:207] 250 UINT8 MIN_PERF_W_8_26_4_52; // Minimum write performance for 8bit at 26MHz, for 4bit at 52MHz [208:208] 251 UINT8 MIN_PERF_R_8_52; // Minimum read performance for 8bit at 52MHz [209:209] 252 UINT8 MIN_PERF_W_8_52; // Minimum write performance for 8bit at 52MHz [210:210] 253 UINT8 RESERVED_18; // Reserved [211:211] 254 UINT32 SECTOR_COUNT; // Sector count [215:212] 255 UINT8 SLEEP_NOTIFICATION_TIME; // Sleep notification timout [216:216] 256 UINT8 S_A_TIMEOUT; // Sleep/awake timeout [217:217] 257 UINT8 PRODUCTION_STATE_AWARENESS_TIMEOUT; // Production state awareness timeout [218:218] 258 UINT8 S_C_VCCQ; // Sleep current (VCCQ) [219:219] 259 UINT8 S_C_VCC; // Sleep current (VCC) [220:220] 260 UINT8 HC_WP_GRP_SIZE; // High-capacity write protect group size [221:221] 261 UINT8 REL_WR_SECTOR_C; // Reliable write sector count [222:222] 262 UINT8 ERASE_TIMEOUT_MULT; // High-capacity erase timeout [223:223] 263 UINT8 HC_ERASE_GRP_SIZE; // High-capacity erase unit size [224:224] 264 UINT8 ACC_SIZE; // Access size [225:225] 265 UINT8 BOOT_SIZE_MULTI; // Boot partition size [226:226] 266 UINT8 RESERVED_19; // Reserved [227:227] 267 UINT8 BOOT_INFO; // Boot information [228:228] 268 UINT8 SECURE_TRIM_MULT; // Secure TRIM Multiplier [229:229] 269 UINT8 SECURE_ERASE_MULT; // Secure Erase Multiplier [230:230] 270 UINT8 SECURE_FEATURE_SUPPORT; // Secure Feature Support [231:231] 271 UINT8 TRIM_MULT; // TRIM Multiplier [232:232] 272 UINT8 RESERVED_20; // Reserved [233:233] 273 UINT8 MIN_PREF_DDR_R_8_52; // Minimum read performance for 8bit at 52MHz in DDR mode [234:234] 274 UINT8 MIN_PREF_DDR_W_8_52; // Minimum write performance for 8bit at 52MHz in DDR mode [235:235] 275 UINT8 PWR_CL_200_130; // Power class for 200MHz at VCCQ=1.3V, VCC=3.6V [236:236] 276 UINT8 PWR_CL_200_195; // Power class for 200MHz at VCCQ=1.95V, VCC=3.6V [237:237] 277 UINT8 PWR_CL_DDR_52_195; // Power class for 52MHz, DDR at 1.95V [238:238] 278 UINT8 PWR_CL_DDR_52_360; // Power class for 52Mhz, DDR at 3.6V [239:239] 279 UINT8 RESERVED_21; // Reserved [240:240] 280 UINT8 INI_TIMEOUT_AP; // 1st initialization time after partitioning [241:241] 281 UINT8 CORRECTLY_PRG_SECTORS_NUM[4]; // Number of correctly programmed sectors [245:242] 282 UINT8 BKOPS_STATUS; // Background operations status [246:246] 283 UINT8 POWER_OFF_LONG_TIME; // Power off notification (long) timeout [247:247] 284 UINT8 GENERIC_CMD6_TIME; // Generic CMD6 timeout [248:248] 285 UINT8 CACHE_SIZE[4]; // Cache size [252:249] 286 UINT8 PWR_CL_DDR_200_360; // Power class for 200MHz, DDR at VCC=3.6V [253:253] 287 UINT8 FIRMWARE_VERSION[8]; // Firmware version [261:254] 288 UINT8 DEVICE_VERSION[2]; // Device version [263:262] 289 UINT8 OPTIMAL_TRIM_UNIT_SIZE; // Optimal trim unit size [264:264] 290 UINT8 OPTIMAL_WRITE_SIZE; // Optimal write size [265:265] 291 UINT8 OPTIMAL_READ_SIZE; // Optimal read size [266:266] 292 UINT8 PRE_EOL_INFO; // Pre EOL information [267:267] 293 UINT8 DEVICE_LIFE_TIME_EST_TYP_A; // Device life time estimation type A [268:268] 294 UINT8 DEVICE_LIFE_TIME_EST_TYP_B; // Device life time estimation type B [269:269] 295 UINT8 VENDOR_PROPRIETARY_HEALTH_REPORT[32]; // Vendor proprietary health report [301:270] 296 UINT8 NUMBER_OF_FW_SECTORS_CORRECTLY_PROGRAMMED[4]; // Number of FW sectors correctly programmed [305:302] 297 UINT8 RESERVED_22[181]; // Reserved [486:306] 298 UINT8 FFU_ARG[4]; // FFU argument [490:487] 299 UINT8 OPERATION_CODE_TIMEOUT; // Operation codes timeout [491:491] 300 UINT8 FFU_FEATURES; // FFU features [492:492] 301 UINT8 SUPPORTED_MODES; // Supported modes [493:493] 302 UINT8 EXT_SUPPORT; // Extended partitions attribute support [494:494] 303 UINT8 LARGE_UNIT_SIZE_M1; // Large unit size [495:495] 304 UINT8 CONTEXT_CAPABILITIES; // Context management capabilities [496:496] 305 UINT8 TAG_RES_SIZE; // Tag resource size [497:497] 306 UINT8 TAG_UNIT_SIZE; // Tag unit size [498:498] 307 UINT8 DATA_TAG_SUPPORT; // Data tag support [499:499] 308 UINT8 MAX_PACKED_WRITES; // Max packed write commands [500:500] 309 UINT8 MAX_PACKED_READS; // Max packed read commands [501:501] 310 UINT8 BKOPS_SUPPORT; // Background operations support [502:502] 311 UINT8 HPI_FEATURES; // HPI features [503:503] 312 UINT8 S_CMD_SET; // Supported command sets [504:504] 313 UINT8 EXT_SECURITY_ERR; // Extended security commands error [505:505] 314 UINT8 RESERVED_23[6]; // Reserved [511:506] 315 } ECSD; 316 317 typedef struct { 318 UINT16 RCA; 319 CARD_TYPE CardType; 320 OCR OCRData; 321 CID CIDData; 322 CSD CSDData; 323 ECSD ECSDData; // MMC V4 extended card specific 324 } CARD_INFO; 325 326 typedef struct _MMC_HOST_INSTANCE { 327 UINTN Signature; 328 LIST_ENTRY Link; 329 EFI_HANDLE MmcHandle; 330 EFI_DEVICE_PATH_PROTOCOL *DevicePath; 331 332 MMC_STATE State; 333 EFI_BLOCK_IO_PROTOCOL BlockIo; 334 EFI_ERASE_BLOCK_PROTOCOL EraseBlockProtocol; 335 CARD_INFO CardInfo; 336 EFI_MMC_HOST_PROTOCOL *MmcHost; 337 338 BOOLEAN Initialized; 339 } MMC_HOST_INSTANCE; 340 341 #define MMC_HOST_INSTANCE_SIGNATURE SIGNATURE_32('m', 'm', 'c', 'h') 342 #define MMC_HOST_INSTANCE_FROM_BLOCK_IO_THIS(a) CR (a, MMC_HOST_INSTANCE, BlockIo, MMC_HOST_INSTANCE_SIGNATURE) 343 #define MMC_HOST_INSTANCE_FROM_LINK(a) CR (a, MMC_HOST_INSTANCE, Link, MMC_HOST_INSTANCE_SIGNATURE) 344 #define MMC_HOST_INSTANCE_FROM_ERASEBLK(a) CR (a, MMC_HOST_INSTANCE, EraseBlockProtocol, MMC_HOST_INSTANCE_SIGNATURE) 345 346 347 EFI_STATUS 348 EFIAPI 349 MmcGetDriverName ( 350 IN EFI_COMPONENT_NAME_PROTOCOL *This, 351 IN CHAR8 *Language, 352 OUT CHAR16 **DriverName 353 ); 354 355 EFI_STATUS 356 EFIAPI 357 MmcGetControllerName ( 358 IN EFI_COMPONENT_NAME_PROTOCOL *This, 359 IN EFI_HANDLE ControllerHandle, 360 IN EFI_HANDLE ChildHandle OPTIONAL, 361 IN CHAR8 *Language, 362 OUT CHAR16 **ControllerName 363 ); 364 365 extern EFI_COMPONENT_NAME_PROTOCOL gMmcComponentName; 366 extern EFI_COMPONENT_NAME2_PROTOCOL gMmcComponentName2; 367 368 extern EFI_DRIVER_DIAGNOSTICS2_PROTOCOL gMmcDriverDiagnostics2; 369 370 extern LIST_ENTRY mMmcHostPool; 371 372 /** 373 Reset the block device. 374 375 This function implements EFI_BLOCK_IO_PROTOCOL.Reset(). 376 It resets the block device hardware. 377 ExtendedVerification is ignored in this implementation. 378 379 @param This Indicates a pointer to the calling context. 380 @param ExtendedVerification Indicates that the driver may perform a more exhaustive 381 verification operation of the device during reset. 382 383 @retval EFI_SUCCESS The block device was reset. 384 @retval EFI_DEVICE_ERROR The block device is not functioning correctly and could not be reset. 385 386 **/ 387 EFI_STATUS 388 EFIAPI 389 MmcReset ( 390 IN EFI_BLOCK_IO_PROTOCOL *This, 391 IN BOOLEAN ExtendedVerification 392 ); 393 394 /** 395 Reads the requested number of blocks from the device. 396 397 This function implements EFI_BLOCK_IO_PROTOCOL.ReadBlocks(). 398 It reads the requested number of blocks from the device. 399 All the blocks are read, or an error is returned. 400 401 @param This Indicates a pointer to the calling context. 402 @param MediaId The media ID that the read request is for. 403 @param Lba The starting logical block address to read from on the device. 404 @param BufferSize The size of the Buffer in bytes. 405 This must be a multiple of the intrinsic block size of the device. 406 @param Buffer A pointer to the destination buffer for the data. The caller is 407 responsible for either having implicit or explicit ownership of the buffer. 408 409 @retval EFI_SUCCESS The data was read correctly from the device. 410 @retval EFI_DEVICE_ERROR The device reported an error while attempting to perform the read operation. 411 @retval EFI_NO_MEDIA There is no media in the device. 412 @retval EFI_MEDIA_CHANGED The MediaId is not for the current media. 413 @retval EFI_BAD_BUFFER_SIZE The BufferSize parameter is not a multiple of the intrinsic block size of the device. 414 @retval EFI_INVALID_PARAMETER The read request contains LBAs that are not valid, 415 or the buffer is not on proper alignment. 416 417 **/ 418 EFI_STATUS 419 EFIAPI 420 MmcReadBlocks ( 421 IN EFI_BLOCK_IO_PROTOCOL *This, 422 IN UINT32 MediaId, 423 IN EFI_LBA Lba, 424 IN UINTN BufferSize, 425 OUT VOID *Buffer 426 ); 427 428 /** 429 Writes a specified number of blocks to the device. 430 431 This function implements EFI_BLOCK_IO_PROTOCOL.WriteBlocks(). 432 It writes a specified number of blocks to the device. 433 All blocks are written, or an error is returned. 434 435 @param This Indicates a pointer to the calling context. 436 @param MediaId The media ID that the write request is for. 437 @param Lba The starting logical block address to be written. 438 @param BufferSize The size of the Buffer in bytes. 439 This must be a multiple of the intrinsic block size of the device. 440 @param Buffer Pointer to the source buffer for the data. 441 442 @retval EFI_SUCCESS The data were written correctly to the device. 443 @retval EFI_WRITE_PROTECTED The device cannot be written to. 444 @retval EFI_NO_MEDIA There is no media in the device. 445 @retval EFI_MEDIA_CHANGED The MediaId is not for the current media. 446 @retval EFI_DEVICE_ERROR The device reported an error while attempting to perform the write operation. 447 @retval EFI_BAD_BUFFER_SIZE The BufferSize parameter is not a multiple of the intrinsic 448 block size of the device. 449 @retval EFI_INVALID_PARAMETER The write request contains LBAs that are not valid, 450 or the buffer is not on proper alignment. 451 452 **/ 453 EFI_STATUS 454 EFIAPI 455 MmcWriteBlocks ( 456 IN EFI_BLOCK_IO_PROTOCOL *This, 457 IN UINT32 MediaId, 458 IN EFI_LBA Lba, 459 IN UINTN BufferSize, 460 IN VOID *Buffer 461 ); 462 463 /** 464 Flushes all modified data to a physical block device. 465 466 @param This Indicates a pointer to the calling context. 467 468 @retval EFI_SUCCESS All outstanding data were written correctly to the device. 469 @retval EFI_DEVICE_ERROR The device reported an error while attempting to write data. 470 @retval EFI_NO_MEDIA There is no media in the device. 471 472 **/ 473 EFI_STATUS 474 EFIAPI 475 MmcFlushBlocks ( 476 IN EFI_BLOCK_IO_PROTOCOL *This 477 ); 478 479 /** 480 Erase a specified number of device blocks. 481 482 This function implements EFI_ERASE_BLOCK_PROTOCOL.EraseBlocks(). 483 484 @param This Indicates a pointer to the calling context. 485 @param MediaId The media ID that the erase request is for. 486 @param Lba The starting logical block address to be erased. The caller is 487 responsible for erasing only legitimate locations. 488 @param Token A pointer to the token associated with the transaction. 489 @param Size The size in bytes to be erased. This must be a multiple of the 490 physical block size of the device. 491 492 @retval EFI_SUCCESS The erase request was queued if Event is not NULL. The data was 493 erased correctly to the device if the Event is NULL. 494 @retval EFI_WRITE_PROTECTED The device cannot be erased due to write protection. 495 @retval EFI_DEVICE_ERROR The device reported an error while attempting to perform the erase operation. 496 @retval EFI_INVALID_PARAMETER The erase request contain LBAs that are not valid. 497 @retval EFI_NO_MEDIA There is no media in the device. 498 @retval EFI_MEDIA_CHANGED The MediaId is not for the current media. 499 500 **/ 501 EFI_STATUS 502 EFIAPI 503 MmcEraseBlocks ( 504 IN EFI_ERASE_BLOCK_PROTOCOL *This, 505 IN UINT32 MediaId, 506 IN EFI_LBA Lba, 507 IN OUT EFI_ERASE_BLOCK_TOKEN *Token, 508 IN UINTN Size 509 ); 510 511 EFI_STATUS 512 MmcNotifyState ( 513 IN MMC_HOST_INSTANCE *MmcHostInstance, 514 IN MMC_STATE State 515 ); 516 517 EFI_STATUS 518 InitializeMmcDevice ( 519 IN MMC_HOST_INSTANCE *MmcHost 520 ); 521 522 VOID 523 EFIAPI 524 CheckCardsCallback ( 525 IN EFI_EVENT Event, 526 IN VOID *Context 527 ); 528 529 VOID 530 PrintCSD ( 531 IN UINT32* Csd 532 ); 533 534 VOID 535 PrintRCA ( 536 IN UINT32 Rca 537 ); 538 539 VOID 540 PrintOCR ( 541 IN UINT32 Ocr 542 ); 543 544 VOID 545 PrintResponseR1 ( 546 IN UINT32 Response 547 ); 548 549 VOID 550 PrintCID ( 551 IN UINT32* Cid 552 ); 553 554 #endif 555
