1 # 2 # Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3 # 4 # SPDX-License-Identifier: BSD-3-Clause 5 # 6 7 # platform configs 8 ENABLE_AFI_DEVICE := 1 9 $(eval $(call add_define,ENABLE_AFI_DEVICE)) 10 11 ENABLE_ROC_FOR_ORDERING_CLIENT_REQUESTS := 1 12 $(eval $(call add_define,ENABLE_ROC_FOR_ORDERING_CLIENT_REQUESTS)) 13 14 RELOCATE_TO_BL31_BASE := 1 15 $(eval $(call add_define,RELOCATE_TO_BL31_BASE)) 16 17 ENABLE_CHIP_VERIFICATION_HARNESS := 0 18 $(eval $(call add_define,ENABLE_CHIP_VERIFICATION_HARNESS)) 19 20 ENABLE_SMMU_DEVICE := 1 21 $(eval $(call add_define,ENABLE_SMMU_DEVICE)) 22 23 NUM_SMMU_DEVICES := 1 24 $(eval $(call add_define,NUM_SMMU_DEVICES)) 25 26 RESET_TO_BL31 := 1 27 28 PROGRAMMABLE_RESET_ADDRESS := 1 29 30 COLD_BOOT_SINGLE_CPU := 1 31 32 # platform settings 33 TZDRAM_BASE := 0x30000000 34 $(eval $(call add_define,TZDRAM_BASE)) 35 36 PLATFORM_CLUSTER_COUNT := 2 37 $(eval $(call add_define,PLATFORM_CLUSTER_COUNT)) 38 39 PLATFORM_MAX_CPUS_PER_CLUSTER := 4 40 $(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER)) 41 42 MAX_XLAT_TABLES := 24 43 $(eval $(call add_define,MAX_XLAT_TABLES)) 44 45 MAX_MMAP_REGIONS := 24 46 $(eval $(call add_define,MAX_MMAP_REGIONS)) 47 48 # platform files 49 PLAT_INCLUDES += -I${SOC_DIR}/drivers/include 50 51 BL31_SOURCES += lib/cpus/aarch64/denver.S \ 52 lib/cpus/aarch64/cortex_a57.S \ 53 ${COMMON_DIR}/drivers/memctrl/memctrl_v2.c \ 54 ${COMMON_DIR}/drivers/smmu/smmu.c \ 55 ${SOC_DIR}/drivers/mce/mce.c \ 56 ${SOC_DIR}/drivers/mce/ari.c \ 57 ${SOC_DIR}/drivers/mce/nvg.c \ 58 ${SOC_DIR}/drivers/mce/aarch64/nvg_helpers.S \ 59 ${SOC_DIR}/plat_memctrl.c \ 60 ${SOC_DIR}/plat_psci_handlers.c \ 61 ${SOC_DIR}/plat_setup.c \ 62 ${SOC_DIR}/plat_secondary.c \ 63 ${SOC_DIR}/plat_sip_calls.c \ 64 ${SOC_DIR}/plat_smmu.c \ 65 ${SOC_DIR}/plat_trampoline.S 66 67
