| /toolchain/binutils/binutils-2.27/opcodes/ |
| m10200-opc.c | 97 #define PSW (IMM24_MEM+1)
101 #define MDR (PSW+1)
172 { "mov", 0xf3f0, 0xfffc, FMT_4, {PSW, DN0}},
173 { "mov", 0xf3d0, 0xfff3, FMT_4, {DN1, PSW}},
284 { "and", 0xf7100000, 0xffff0000, FMT_6, {SIMM16N, PSW}},
288 { "or", 0xf7140000, 0xffff0000, FMT_6, {SIMM16N, PSW}},
|
| m10300-opc.c | 147 #define PSW (SP+1)
151 #define MDR (PSW+1)
458 { "mov", 0xf2e4, 0xfffc, 0, FMT_D0, 0, {PSW, DN0}},
459 { "mov", 0xf2f3, 0xfff3, 0, FMT_D0, 0, {DM1, PSW}},
[all...] |
| ppc-opc.c | 364 #define PSW E
[all...] |
| /toolchain/binutils/binutils-2.27/include/opcode/ |
| convex.h | 49 #define PSW 8
76 "psw",
463 {0,0,lr,PSW,A,0}, /* mov */
464 {0,0,rxl,A,PSW,0}, /* mov */
[all...] |
