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      1 /*
      2  * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
      3  *
      4  * SPDX-License-Identifier: BSD-3-Clause
      5  */
      6 
      7 #ifndef __SMCC_HELPERS_H__
      8 #define __SMCC_HELPERS_H__
      9 
     10 #include <smcc.h>
     11 
     12 #ifndef __ASSEMBLY__
     13 #include <context.h>
     14 
     15 /* Convenience macros to return from SMC handler */
     16 #define SMC_RET0(_h)	{					\
     17 	return (uint64_t) (_h);					\
     18 }
     19 #define SMC_RET1(_h, _x0)	{				\
     20 	write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X0), (_x0));	\
     21 	SMC_RET0(_h);						\
     22 }
     23 #define SMC_RET2(_h, _x0, _x1)	{				\
     24 	write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X1), (_x1));	\
     25 	SMC_RET1(_h, (_x0));					\
     26 }
     27 #define SMC_RET3(_h, _x0, _x1, _x2)	{			\
     28 	write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X2), (_x2));	\
     29 	SMC_RET2(_h, (_x0), (_x1));				\
     30 }
     31 #define SMC_RET4(_h, _x0, _x1, _x2, _x3)	{		\
     32 	write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X3), (_x3));	\
     33 	SMC_RET3(_h, (_x0), (_x1), (_x2));			\
     34 }
     35 #define SMC_RET5(_h, _x0, _x1, _x2, _x3, _x4)	{		\
     36 	write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X4), (_x4));	\
     37 	SMC_RET4(_h, (_x0), (_x1), (_x2), (_x3));		\
     38 }
     39 #define SMC_RET6(_h, _x0, _x1, _x2, _x3, _x4, _x5)	{	\
     40 	write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X5), (_x5));	\
     41 	SMC_RET5(_h, (_x0), (_x1), (_x2), (_x3), (_x4));	\
     42 }
     43 #define SMC_RET7(_h, _x0, _x1, _x2, _x3, _x4, _x5, _x6)	{	\
     44 	write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X6), (_x6));	\
     45 	SMC_RET6(_h, (_x0), (_x1), (_x2), (_x3), (_x4), (_x5));	\
     46 }
     47 #define SMC_RET8(_h, _x0, _x1, _x2, _x3, _x4, _x5, _x6, _x7) {	\
     48 	write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X7), (_x7));	\
     49 	SMC_RET7(_h, (_x0), (_x1), (_x2), (_x3), (_x4), (_x5), (_x6));	\
     50 }
     51 
     52 /*
     53  * Convenience macros to access general purpose registers using handle provided
     54  * to SMC handler. These take the offset values defined in context.h
     55  */
     56 #define SMC_GET_GP(_h, _g)					\
     57 	read_ctx_reg((get_gpregs_ctx(_h)), (_g))
     58 #define SMC_SET_GP(_h, _g, _v)					\
     59 	write_ctx_reg((get_gpregs_ctx(_h)), (_g), (_v))
     60 
     61 /*
     62  * Convenience macros to access EL3 context registers using handle provided to
     63  * SMC handler. These take the offset values defined in context.h
     64  */
     65 #define SMC_GET_EL3(_h, _e)					\
     66 	read_ctx_reg((get_el3state_ctx(_h)), (_e))
     67 #define SMC_SET_EL3(_h, _e, _v)					\
     68 	write_ctx_reg((get_el3state_ctx(_h)), (_e), (_v))
     69 
     70 /* Return a UUID in the SMC return registers */
     71 #define SMC_UUID_RET(_h, _uuid)					\
     72 	SMC_RET4(handle, ((const uint32_t *) &(_uuid))[0],	\
     73 			 ((const uint32_t *) &(_uuid))[1],	\
     74 			 ((const uint32_t *) &(_uuid))[2],	\
     75 			 ((const uint32_t *) &(_uuid))[3])
     76 
     77 /*
     78  * Helper macro to retrieve the SMC parameters from cpu_context_t.
     79  */
     80 #define get_smc_params_from_ctx(_hdl, _x1, _x2, _x3, _x4)	\
     81 	do {							\
     82 		const gp_regs_t *regs = get_gpregs_ctx(_hdl);	\
     83 		_x1 = read_ctx_reg(regs, CTX_GPREG_X1);		\
     84 		_x2 = read_ctx_reg(regs, CTX_GPREG_X2);		\
     85 		_x3 = read_ctx_reg(regs, CTX_GPREG_X3);		\
     86 		_x4 = read_ctx_reg(regs, CTX_GPREG_X4);		\
     87 	} while (0)
     88 
     89 #endif /*__ASSEMBLY__*/
     90 #endif /* __SMCC_HELPERS_H__ */
     91