1 /****************************************************************************** 2 * 3 * Copyright 2018 NXP 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ******************************************************************************/ 18 19 /** 20 * \addtogroup SPI_Power_Management 21 * 22 * @{ */ 23 24 #ifndef _PHNXPESE_SPM_H 25 #define _PHNXPESE_SPM_H 26 27 #include <phEseStatus.h> 28 #include <phNxpEseFeatures.h> 29 /*! SPI Power Manager (SPM) possible error codes */ 30 typedef enum spm_power { 31 SPM_POWER_ENABLE = 0, 32 SPM_POWER_DISABLE, /*!< SPM power disable */ 33 SPM_POWER_RESET, /*!< SPM Reset pwer */ 34 SPM_POWER_PRIO_ENABLE, /*!< SPM prio mode enable */ 35 SPM_POWER_PRIO_DISABLE /*!< SPM prio mode disable */ 36 } spm_power_t; 37 38 typedef enum spm_state { 39 SPM_STATE_INVALID = 0x0000, /*!< Nfc i2c driver misbehaving */ 40 SPM_STATE_IDLE = 0x0100, /*!< ESE is free to use */ 41 SPM_STATE_WIRED = 0x0200, /*!< p61 is being accessed by DWP (NFCC)*/ 42 SPM_STATE_SPI = 0x0400, /*!< ESE is being accessed by SPI */ 43 SPM_STATE_DWNLD = 0x0800, /*!< NFCC fw download is in progress */ 44 SPM_STATE_SPI_PRIO = 0x1000, /*!< Start of p61 access by SPI on priority*/ 45 SPM_STATE_SPI_PRIO_END = 0x2000 /*!< End of p61 access by SPI on priority*/ 46 #ifdef NXP_ESE_JCOP_DWNLD_PROTECTION 47 , 48 SPM_STATE_JCOP_DWNLD = 0x8000 /*!< P73 state JCOP Download*/ 49 #endif 50 } spm_state_t; 51 52 ESESTATUS phNxpEse_SPM_Init(void* pDevHandle); 53 54 ESESTATUS phNxpEse_SPM_DeInit(void); 55 56 ESESTATUS phNxpEse_SPM_ConfigPwr(spm_power_t arg); 57 58 ESESTATUS phNxpEse_SPM_EnablePwr(void); 59 60 ESESTATUS phNxpEse_SPM_DisablePwr(void); 61 62 ESESTATUS phNxpEse_SPM_GetState(spm_state_t* current_state); 63 64 #ifdef NXP_ESE_JCOP_DWNLD_PROTECTION 65 ESESTATUS phNxpEse_SPM_SetState(long arg); 66 #endif 67 68 ESESTATUS phNxpEse_SPM_RelAccess(void); 69 70 ESESTATUS phNxpEse_SPM_SetPwrScheme(long arg); 71 72 ESESTATUS phNxpEse_SPM_DisablePwrControl(unsigned long arg); 73 #ifdef NXP_ESE_JCOP_DWNLD_PROTECTION 74 ESESTATUS phNxpEse_SPM_SetJcopDwnldState(long arg); 75 #endif 76 #endif /* _PHNXPESE_SPM_H */ 77 /** @} */ 78
