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      1 /*
      2  * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
      3  *
      4  * SPDX-License-Identifier: BSD-3-Clause
      5  */
      6 
      7 #ifndef __TLKD_PRIVATE_H__
      8 #define __TLKD_PRIVATE_H__
      9 
     10 #include <arch.h>
     11 #include <context.h>
     12 #include <interrupt_mgmt.h>
     13 #include <platform_def.h>
     14 #include <psci.h>
     15 
     16 /*
     17  * This flag is used by the TLKD to determine if the SP is servicing a yielding
     18  * SMC request prior to programming the next entry into the SP e.g. if SP
     19  * execution is preempted by a non-secure interrupt and handed control to the
     20  * normal world. If another request which is distinct from what the SP was
     21  * previously doing arrives, then this flag will be help the TLKD to either
     22  * reject the new request or service it while ensuring that the previous context
     23  * is not corrupted.
     24  */
     25 #define YIELD_SMC_ACTIVE_FLAG_SHIFT	2
     26 #define YIELD_SMC_ACTIVE_FLAG_MASK	1
     27 #define get_yield_smc_active_flag(state)				\
     28 			(((state) >> YIELD_SMC_ACTIVE_FLAG_SHIFT)	\
     29 			& YIELD_SMC_ACTIVE_FLAG_MASK)
     30 #define set_yield_smc_active_flag(state)	((state) |=		\
     31 					 (1 << YIELD_SMC_ACTIVE_FLAG_SHIFT))
     32 #define clr_yield_smc_active_flag(state)	((state) &=		\
     33 					 ~(YIELD_SMC_ACTIVE_FLAG_MASK	\
     34 					 << YIELD_SMC_ACTIVE_FLAG_SHIFT))
     35 
     36 /*******************************************************************************
     37  * Translate virtual address received from the NS world
     38  ******************************************************************************/
     39 #define TLK_TRANSLATE_NS_VADDR		4
     40 
     41 /*******************************************************************************
     42  * Secure Payload execution state information i.e. aarch32 or aarch64
     43  ******************************************************************************/
     44 #define SP_AARCH32		MODE_RW_32
     45 #define SP_AARCH64		MODE_RW_64
     46 
     47 /*******************************************************************************
     48  * Number of cpus that the present on this platform. TODO: Rely on a topology
     49  * tree to determine this in the future to avoid assumptions about mpidr
     50  * allocation
     51  ******************************************************************************/
     52 #define TLKD_CORE_COUNT		PLATFORM_CORE_COUNT
     53 
     54 /*******************************************************************************
     55  * Constants that allow assembler code to preserve callee-saved registers of the
     56  * C runtime context while performing a security state switch.
     57  ******************************************************************************/
     58 #define TLKD_C_RT_CTX_X19		0x0
     59 #define TLKD_C_RT_CTX_X20		0x8
     60 #define TLKD_C_RT_CTX_X21		0x10
     61 #define TLKD_C_RT_CTX_X22		0x18
     62 #define TLKD_C_RT_CTX_X23		0x20
     63 #define TLKD_C_RT_CTX_X24		0x28
     64 #define TLKD_C_RT_CTX_X25		0x30
     65 #define TLKD_C_RT_CTX_X26		0x38
     66 #define TLKD_C_RT_CTX_X27		0x40
     67 #define TLKD_C_RT_CTX_X28		0x48
     68 #define TLKD_C_RT_CTX_X29		0x50
     69 #define TLKD_C_RT_CTX_X30		0x58
     70 #define TLKD_C_RT_CTX_SIZE		0x60
     71 #define TLKD_C_RT_CTX_ENTRIES		(TLKD_C_RT_CTX_SIZE >> DWORD_SHIFT)
     72 
     73 #ifndef __ASSEMBLY__
     74 
     75 #include <cassert.h>
     76 #include <stdint.h>
     77 
     78 /* AArch64 callee saved general purpose register context structure. */
     79 DEFINE_REG_STRUCT(c_rt_regs, TLKD_C_RT_CTX_ENTRIES);
     80 
     81 /*
     82  * Compile time assertion to ensure that both the compiler and linker
     83  * have the same double word aligned view of the size of the C runtime
     84  * register context.
     85  */
     86 CASSERT(TLKD_C_RT_CTX_SIZE == sizeof(c_rt_regs_t),	\
     87 	assert_tlkd_c_rt_regs_size_mismatch);
     88 
     89 /*******************************************************************************
     90  * Structure which helps the SPD to maintain the per-cpu state of the SP.
     91  * 'state'          - collection of flags to track SP state e.g. on/off
     92  * 'mpidr'          - mpidr to associate a context with a cpu
     93  * 'c_rt_ctx'       - stack address to restore C runtime context from after
     94  *                    returning from a synchronous entry into the SP.
     95  * 'cpu_ctx'        - space to maintain SP architectural state
     96  * 'saved_tsp_args' - space to store arguments for TSP arithmetic operations
     97  *                    which will queried using the TSP_GET_ARGS SMC by TSP.
     98  ******************************************************************************/
     99 typedef struct tlk_context {
    100 	uint32_t state;
    101 	uint64_t mpidr;
    102 	uint64_t c_rt_ctx;
    103 	cpu_context_t cpu_ctx;
    104 } tlk_context_t;
    105 
    106 /*******************************************************************************
    107  * Function & Data prototypes
    108  ******************************************************************************/
    109 uint64_t tlkd_va_translate(uintptr_t va, int type);
    110 uint64_t tlkd_enter_sp(uint64_t *c_rt_ctx);
    111 void __dead2 tlkd_exit_sp(uint64_t c_rt_ctx, uint64_t ret);
    112 uint64_t tlkd_synchronous_sp_entry(tlk_context_t *tlk_ctx);
    113 void __dead2 tlkd_synchronous_sp_exit(tlk_context_t *tlk_ctx,
    114 			uint64_t ret);
    115 void tlkd_init_tlk_ep_state(struct entry_point_info *tlk_entry_point,
    116 				uint32_t rw,
    117 				uint64_t pc,
    118 				tlk_context_t *tlk_ctx);
    119 
    120 #endif /*__ASSEMBLY__*/
    121 
    122 #endif /* __TLKD_PRIVATE_H__ */
    123