| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMFrameLowering.h | 26 const ARMSubtarget &STI;
29 explicit ARMFrameLowering(const ARMSubtarget &sti)
30 : TargetFrameLowering(StackGrowsDown, sti.getStackAlignment(), 0, 4),
31 STI(sti) {
|
| ARMHazardRecognizer.h | 29 const ARMSubtarget &STI;
40 const ARMSubtarget &sti,
43 TRI(tri), STI(sti), LastMI(0), ITBlockSize(0) {}
|
| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| BlackfinFrameLowering.h | 26 const BlackfinSubtarget &STI;
29 explicit BlackfinFrameLowering(const BlackfinSubtarget &sti)
30 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 4, 0), STI(sti) {
|
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| MSP430FrameLowering.h | 26 const MSP430Subtarget &STI;
29 explicit MSP430FrameLowering(const MSP430Subtarget &sti)
30 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 2, -2), STI(sti) {
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| MipsFrameLowering.h | 26 const MipsSubtarget &STI;
29 explicit MipsFrameLowering(const MipsSubtarget &sti)
30 : TargetFrameLowering(StackGrowsDown, sti.hasMips64() ? 16 : 8, 0),
31 STI(sti) {
|
| /external/llvm/lib/Target/ARM/ |
| ARMFrameLowering.h | 24 const ARMSubtarget &STI;
27 explicit ARMFrameLowering(const ARMSubtarget &sti);
|
| /external/llvm/lib/Target/Lanai/ |
| LanaiFrameLowering.h | 31 const LanaiSubtarget &STI;
38 STI(Subtarget) {}
|
| /external/llvm/lib/Target/Mips/ |
| MipsFrameLowering.h | 25 const MipsSubtarget &STI;
28 explicit MipsFrameLowering(const MipsSubtarget &sti, unsigned Alignment)
29 : TargetFrameLowering(StackGrowsDown, Alignment, 0, Alignment), STI(sti) {}
|
| MipsHazardSchedule.cpp | 104 const MipsSubtarget *STI =
108 if (!STI->hasMips32r6() || STI->inMicroMipsMode())
112 const MipsInstrInfo *TII = STI->getInstrInfo();
|
| MipsMachineFunction.cpp | 38 MipsSubtarget const &STI =
42 STI.inMips16Mode()
44 : STI.inMicroMipsMode()
45 ? STI.hasMips64()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| AlphaFrameLowering.h | 25 const AlphaSubtarget &STI;
29 explicit AlphaFrameLowering(const AlphaSubtarget &sti)
30 : TargetFrameLowering(StackGrowsDown, 16, 0), STI(sti), curgpdist(0) {
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| MBlazeFrameLowering.h | 26 const MBlazeSubtarget &STI;
29 explicit MBlazeFrameLowering(const MBlazeSubtarget &sti)
30 : TargetFrameLowering(TargetFrameLowering::StackGrowsUp, 4, 0), STI(sti) {
|
| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| PTXFrameLowering.h | 26 const PTXSubtarget &STI;
29 explicit PTXFrameLowering(const PTXSubtarget &sti)
31 STI(sti) {
|
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| SparcFrameLowering.h | 25 const SparcSubtarget &STI;
27 explicit SparcFrameLowering(const SparcSubtarget &sti)
28 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 8, 0), STI(sti) {
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86FrameLowering.h | 27 const X86Subtarget &STI;
29 explicit X86FrameLowering(const X86TargetMachine &tm, const X86Subtarget &sti)
31 sti.getStackAlignment(),
32 (sti.is64Bit() ? -8 : -4)),
33 TM(tm), STI(sti) {
|
| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| XCoreFrameLowering.h | 25 const XCoreSubtarget &STI;
27 XCoreFrameLowering(const XCoreSubtarget &STI);
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.h | 442 const NVPTXSubtarget &STI);
520 const NVPTXSubtarget &STI; // cache the subtarget here
|
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmInstrumentation.h | 32 const MCSubtargetInfo *&STI);
53 const MCSubtargetInfo *&STI);
55 X86AsmInstrumentation(const MCSubtargetInfo *&STI);
61 const MCSubtargetInfo *&STI;
|
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| SystemZFrameLowering.h | 28 const SystemZSubtarget &STI;
31 explicit SystemZFrameLowering(const SystemZSubtarget &sti);
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/MCTargetDesc/ |
| MipsMCCodeEmitter.cpp | 33 const MCSubtargetInfo &STI;
36 MipsMCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti,
38 : MCII(mcii), STI(sti) {}
49 const MCSubtargetInfo &STI,
51 return new MipsMCCodeEmitter(MCII, STI, Ctx);
|
| /external/llvm/include/llvm/MC/MCDisassembler/ |
| MCDisassembler.h | 56 MCDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx)
57 : Ctx(Ctx), STI(STI), Symbolizer(), CommentStream(nullptr) {}
86 const MCSubtargetInfo &STI;
104 const MCSubtargetInfo& getSubtargetInfo() const { return STI; }
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64RegisterBankInfo.cpp | 124 const TargetSubtargetInfo &STI = MF.getSubtarget();
125 const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
|
| AArch64SelectionDAGInfo.cpp | 26 const AArch64Subtarget &STI =
29 (V && V->isNullValue()) ? STI.getBZeroEntry() : nullptr;
33 const AArch64TargetLowering &TLI = *STI.getTargetLowering();
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMAsmBackend.h | 22 const MCSubtargetInfo *STI;
27 : MCAsmBackend(), STI(ARM_MC::createARMMCSubtargetInfo(TT, "", "")),
31 ~ARMAsmBackend() override { delete STI; }
37 bool hasNOP() const { return STI->getFeatureBits()[ARM::HasV6T2Ops]; }
66 void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
|
| /external/llvm/lib/Target/X86/ |
| X86FrameLowering.h | 28 X86FrameLowering(const X86Subtarget &STI, unsigned StackAlignOverride);
32 const X86Subtarget &STI;
|
