| /external/llvm/test/MC/AsmParser/ |
| directive_ascii.s | 30 # CHECK: TEST5:
32 TEST5:
|
| directive_values.s | 39 TEST5:
41 # CHECK: TEST5:
|
| directive_fill.s | 31 # CHECK: TEST5
33 TEST5:
|
| /external/swiftshader/third_party/LLVM/test/MC/AsmParser/ |
| directive_ascii.s | 30 # CHECK: TEST5:
32 TEST5:
|
| directive_values.s | 39 TEST5:
41 # CHECK: TEST5:
|
| /external/valgrind/none/tests/mips64/ |
| macro_int.h | 71 #define TEST5(instruction, RSval, RTval, RS, RT) \
|
| branch_and_jump_instructions.c | 152 #define TEST5(instruction, RDval, RSval, RD, RS) \
231 TEST5("bgezal", 0, 0, 2, 3);
232 TEST5("bgezal", 1, 1, 3, 4);
233 TEST5("bgezal", 2, 0xffffffff, 4, 5);
234 TEST5("bgezal", 3, 0xffffffff, 5, 6);
235 TEST5("bgezal", 4, 0xfffffffe, 6, 7);
236 TEST5("bgezal", 5, 0xffffffff, 7, 8);
237 TEST5("bgezal", 6, 0x5, 8, 9);
238 TEST5("bgezal", 7, -3, 9, 10);
239 TEST5("bgezal", 8, 125, 10, 11)
[all...] |
| macro_load_store.h | 104 #define TEST5(instruction, offset, mem) \
|
| move_instructions.c | 178 #define TEST5(instruction, RDval, RSval, RD, RS) \
358 TEST5("movf", 0xaaaaaaaa, 0x80000000, t0, t1);
359 TEST5("movf", 0xccccffff, 0xffffffff, t1, t2);
360 TEST5("movf", 0xffffaaaa, 0xaaaaffff, t3, t1);
361 TEST5("movf", 0x0, 0xffffffff, t3, t0);
367 TEST5("movt", 0x0, 0xffffffff, t0, t1);
368 TEST5("movt", 0x11111111, 0xeeeeffff, t1, t2);
369 TEST5("movt", 0x5555ffff, 0xffffffff, t3, t1);
370 TEST5("movt", 0xeeeeeeee, 0xffffeeee, t3, t0);
|
