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      1 /** @file
      2 
      3   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
      4 
      5   This program and the accompanying materials
      6   are licensed and made available under the terms and conditions of the BSD License
      7   which accompanies this distribution.  The full text of the license may be found at
      8   http://opensource.org/licenses/bsd-license.php
      9 
     10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
     12 
     13 **/
     14 
     15 #ifndef __OMAP3530UART_H__
     16 #define __OMAP3530UART_H__
     17 
     18 #define UART1_BASE  (0x4806A000)
     19 #define UART2_BASE  (0x4806C000)
     20 #define UART3_BASE  (0x49020000)
     21 
     22 #define UART_DLL_REG  (0x0000)
     23 #define UART_RBR_REG  (0x0000)
     24 #define UART_THR_REG  (0x0000)
     25 #define UART_DLH_REG  (0x0004)
     26 #define UART_FCR_REG  (0x0008)
     27 #define UART_LCR_REG  (0x000C)
     28 #define UART_MCR_REG  (0x0010)
     29 #define UART_LSR_REG  (0x0014)
     30 #define UART_MDR1_REG (0x0020)
     31 
     32 #define UART_FCR_TX_FIFO_CLEAR          BIT2
     33 #define UART_FCR_RX_FIFO_CLEAR          BIT1
     34 #define UART_FCR_FIFO_ENABLE            BIT0
     35 
     36 #define UART_LCR_DIV_EN_ENABLE          BIT7
     37 #define UART_LCR_DIV_EN_DISABLE         (0UL << 7)
     38 #define UART_LCR_CHAR_LENGTH_8          (BIT1 | BIT0)
     39 
     40 #define UART_MCR_RTS_FORCE_ACTIVE       BIT1
     41 #define UART_MCR_DTR_FORCE_ACTIVE       BIT0
     42 
     43 #define UART_LSR_TX_FIFO_E_MASK         BIT5
     44 #define UART_LSR_TX_FIFO_E_NOT_EMPTY    (0UL << 5)
     45 #define UART_LSR_TX_FIFO_E_EMPTY        BIT5
     46 #define UART_LSR_RX_FIFO_E_MASK         BIT0
     47 #define UART_LSR_RX_FIFO_E_NOT_EMPTY    BIT0
     48 #define UART_LSR_RX_FIFO_E_EMPTY        (0UL << 0)
     49 
     50 // BIT2:BIT0
     51 #define UART_MDR1_MODE_SELECT_DISABLE   (7UL)
     52 #define UART_MDR1_MODE_SELECT_UART_16X  (0UL)
     53 
     54 #endif // __OMAP3530UART_H__
     55