| /external/llvm/test/MC/AArch64/ |
| arm64-diags.s | 270 ands w0, w0, w0, lsl #32 label
272 ; CHECK-ERRORS: ands w0, w0, w0, lsl #32
|
| /external/vixl/src/aarch64/ |
| assembler-aarch64.cc | 500 void Assembler::ands(const Register& rd, function in class:vixl::aarch64::Assembler
503 Logical(rd, rn, operand, ANDS);
508 ands(AppropriateZeroRegFor(rn), rn, operand);
[all...] |
| /external/v8/src/arm64/ |
| assembler-arm64.cc | 1194 void Assembler::ands(const Register& rd, function in class:v8::internal::Assembler
[all...] |
| /external/vixl/src/aarch32/ |
| assembler-aarch32.cc | 2768 void Assembler::ands(Condition cond, function in class:vixl::aarch32::Assembler
[all...] |
| assembler-aarch32.h | 1962 void ands(Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler
1965 void ands(Condition cond, Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler
1968 void ands(EncodingSize size, function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.cc | 1220 void Disassembler::ands(Condition cond, function in class:vixl::aarch32::Disassembler
[all...] |
