1 /*- 2 * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Modified for gPXE, July 2009, by Joshua Oreman <oremanj (at) rwcr.net> 6 * Original from Linux kernel 2.6.30. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer, 13 * without modification. 14 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 15 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 16 * redistribution must be conditioned upon including a substantially 17 * similar Disclaimer requirement for further binary redistribution. 18 * 3. Neither the names of the above-listed copyright holders nor the names 19 * of any contributors may be used to endorse or promote products derived 20 * from this software without specific prior written permission. 21 * 22 * Alternatively, this software may be distributed under the terms of the 23 * GNU General Public License ("GPL") version 2 as published by the Free 24 * Software Foundation. 25 * 26 * NO WARRANTY 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 30 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 31 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 32 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 35 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 37 * THE POSSIBILITY OF SUCH DAMAGES. 38 * 39 */ 40 41 /* 42 * Defintions for the Atheros Wireless LAN controller driver. 43 */ 44 #ifndef _DEV_ATH_ATHVAR_H 45 #define _DEV_ATH_ATHVAR_H 46 47 FILE_LICENCE ( BSD3 ); 48 49 #include "ath5k.h" 50 #include <gpxe/iobuf.h> 51 52 #define ATH_RXBUF 16 /* number of RX buffers */ 53 #define ATH_TXBUF 16 /* number of TX buffers */ 54 55 struct ath5k_buf { 56 struct list_head list; 57 unsigned int flags; /* rx descriptor flags */ 58 struct ath5k_desc *desc; /* virtual addr of desc */ 59 u32 daddr; /* physical addr of desc */ 60 struct io_buffer *iob; /* I/O buffer for buf */ 61 u32 iobaddr;/* physical addr of iob data */ 62 }; 63 64 /* 65 * Data transmit queue state. One of these exists for each 66 * hardware transmit queue. Packets sent to us from above 67 * are assigned to queues based on their priority. Not all 68 * devices support a complete set of hardware transmit queues. 69 * For those devices the array sc_ac2q will map multiple 70 * priorities to fewer hardware queues (typically all to one 71 * hardware queue). 72 */ 73 struct ath5k_txq { 74 unsigned int qnum; /* hardware q number */ 75 u32 *link; /* link ptr in last TX desc */ 76 struct list_head q; /* transmit queue */ 77 int setup; 78 }; 79 80 #if CHAN_DEBUG 81 #define ATH_CHAN_MAX (26+26+26+200+200) 82 #else 83 #define ATH_CHAN_MAX (14+14+14+252+20) 84 #endif 85 86 /* Software Carrier, keeps track of the driver state 87 * associated with an instance of a device */ 88 struct ath5k_softc { 89 struct pci_device *pdev; /* for dma mapping */ 90 void *iobase; /* address of the device */ 91 struct net80211_device *dev; /* IEEE 802.11 common */ 92 struct ath5k_hw *ah; /* Atheros HW */ 93 struct net80211_hw_info *hwinfo; 94 int curband; 95 int irq_ena; /* interrupts enabled */ 96 97 struct ath5k_buf *bufptr; /* allocated buffer ptr */ 98 struct ath5k_desc *desc; /* TX/RX descriptors */ 99 u32 desc_daddr; /* DMA (physical) address */ 100 size_t desc_len; /* size of TX/RX descriptors */ 101 u16 cachelsz; /* cache line size */ 102 103 int status; 104 #define ATH_STAT_INVALID 0x01 /* disable hardware accesses */ 105 #define ATH_STAT_MRRETRY 0x02 /* multi-rate retry support */ 106 #define ATH_STAT_PROMISC 0x04 107 #define ATH_STAT_LEDSOFT 0x08 /* enable LED gpio status */ 108 #define ATH_STAT_STARTED 0x10 /* opened & irqs enabled */ 109 110 unsigned int filter_flags; /* HW flags, AR5K_RX_FILTER_* */ 111 unsigned int curmode; /* current phy mode */ 112 struct net80211_channel *curchan; /* current h/w channel */ 113 114 enum ath5k_int imask; /* interrupt mask copy */ 115 116 u8 bssidmask[ETH_ALEN]; 117 118 unsigned int rxbufsize; /* rx size based on mtu */ 119 struct list_head rxbuf; /* receive buffer */ 120 u32 *rxlink; /* link ptr in last RX desc */ 121 122 struct list_head txbuf; /* transmit buffer */ 123 unsigned int txbuf_len; /* buf count in txbuf list */ 124 struct ath5k_txq txq; /* tx queue */ 125 126 struct { 127 u16 gpio; 128 unsigned polarity; 129 } rf_kill; 130 131 int last_calib_ticks; 132 133 int power_level; /* Requested tx power in dbm */ 134 int assoc; /* assocate state */ 135 136 int hw_rate; /* Hardware tx rate code */ 137 int hw_rtscts_rate; /* Hardware rts/cts rate code */ 138 }; 139 140 #define ath5k_hw_hasbssidmask(_ah) \ 141 (ath5k_hw_get_capability(_ah, AR5K_CAP_BSSIDMASK, 0, NULL) == 0) 142 #define ath5k_hw_hasveol(_ah) \ 143 (ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0) 144 145 #endif 146
