| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/Ia32/ |
| WriteCr0.c | 25 mov cr0, eax
local
|
| DisablePaging32.c | 36 mov eax, cr0
39 mov cr0, eax
local
|
| EnablePaging32.c | 36 mov eax, cr0
39 mov cr0, eax
local
|
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Ia32/ |
| DisableCache.c | 16 Set CD bit and clear NW bit of CR0 followed by a WBINVD.
18 Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
29 mov eax, cr0
32 mov cr0, eax
local
|
| EnableCache.c | 16 Perform a WBINVD and clear both the CD and NW bits of CR0.
19 bits of CR0 to 0. This function is only available on IA-32 and x64.
30 mov eax, cr0
33 mov cr0, eax
local
|
| WriteCr0.c | 16 Writes a value to Control Register 0 (CR0).
18 Writes and returns a new value to CR0. This function is only available on
21 @param Value The value to write to CR0.
23 @return The value written to CR0.
34 mov cr0, eax
local
|
| DisablePaging32.c | 32 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
66 mov eax, cr0
69 mov cr0, eax
local
|
| EnablePaging32.c | 20 Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
34 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
69 mov eax, cr0
72 mov cr0, eax
local
|
| /external/slf4j/slf4j-migrator/src/main/java/org/slf4j/migrator/line/ |
| JCLRuleSet.java | 43 SingleConversionRule cr0 = new SingleConversionRule(Pattern.compile("import\\s*+org.apache.commons.logging.LogFactory;"), local
58 conversionRuleList.add(cr0);
|
| /external/syslinux/com32/lib/sys/i386/ |
| x86_init_fpu.c | 13 asm("movl %%cr0,%0":"=r"(v));
19 asm volatile ("movl %0,%%cr0"::"r" (v));
36 uint32_t cr0; local
40 cr0 = get_cr0();
41 cr0 &= ~(CR0_EM | CR0_TS);
42 cr0 |= CR0_MP;
43 set_cr0(cr0);
|
| /external/syslinux/com32/lib/sys/x86_64/ |
| x86_init_fpu.c | 13 asm("movq %%cr0,%0":"=r"(v));
19 asm volatile ("movq %0,%%cr0"::"r" ((uint64_t)v));
36 uint32_t cr0; local
40 cr0 = get_cr0();
41 cr0 &= ~(CR0_EM | CR0_TS);
42 cr0 |= CR0_MP;
43 set_cr0(cr0);
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/IA32/ |
| CpuIA32.c | 104 mov eax, cr0
109 mov eax, cr0
111 mov cr0, eax
local
122 mov eax, cr0
124 mov cr0, eax
local
|
| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/ |
| CpuIA32.c | 116 mov eax, cr0
121 mov eax, cr0
123 mov cr0, eax
134 mov eax, cr0
136 mov cr0, eax
114 mov cr0, eax local
127 mov cr0, eax local
|
| /external/libjpeg-turbo/simd/ |
| jccolext-altivec.c | 48 __vector int y0, y1, y2, y3, cr0, cr1, cr2, cr3, cb0, cb1, cb2, cb3; local
247 cr0 = vec_msums(bg0, pw_mf008_mf041, pd_onehalfm1_cj);
251 cr0 = (__vector int)vec_msum((__vector unsigned short)rg0, pw_f050_f000,
252 (__vector unsigned int)cr0);
259 crl = vec_perm((__vector unsigned short)cr0,
|
| /external/valgrind/include/vki/ |
| vki-xen-x86.h | 130 unsigned long ctrlreg[8]; /* CR0-CR7 (control registers) */
185 vki_uint64_t cr0; member in struct:vki_hvm_hw_cpu
|
| /bionic/libc/kernel/uapi/asm-x86/asm/ |
| kvm.h | 142 __u64 cr0, cr2, cr3, cr4, cr8; member in struct:kvm_sregs
|
| /external/kernel-headers/original/uapi/asm-x86/asm/ |
| kvm.h | 154 __u64 cr0, cr2, cr3, cr4, cr8; member in struct:kvm_sregs
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/i386-linux-gnu/asm/ |
| kvm.h | 128 __u64 cr0, cr2, cr3, cr4, cr8; member in struct:kvm_sregs
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/x86_64-linux-gnu/asm/ |
| kvm.h | 128 __u64 cr0, cr2, cr3, cr4, cr8; member in struct:kvm_sregs
|
| /external/valgrind/VEX/priv/ |
| guest_ppc_toIR.c | 6277 IRTemp cr0 = newTemp(Ity_I32); local
[all...] |
