1 /* 2 * Copyright (C) 2016 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef ART_COMPILER_DEBUG_ELF_DEBUG_LOC_WRITER_H_ 18 #define ART_COMPILER_DEBUG_ELF_DEBUG_LOC_WRITER_H_ 19 20 #include <cstring> 21 #include <map> 22 23 #include "arch/instruction_set.h" 24 #include "compiled_method.h" 25 #include "debug/dwarf/debug_info_entry_writer.h" 26 #include "debug/dwarf/register.h" 27 #include "debug/method_debug_info.h" 28 #include "stack_map.h" 29 30 namespace art { 31 namespace debug { 32 using Reg = dwarf::Reg; 33 34 static Reg GetDwarfCoreReg(InstructionSet isa, int machine_reg) { 35 switch (isa) { 36 case InstructionSet::kArm: 37 case InstructionSet::kThumb2: 38 return Reg::ArmCore(machine_reg); 39 case InstructionSet::kArm64: 40 return Reg::Arm64Core(machine_reg); 41 case InstructionSet::kX86: 42 return Reg::X86Core(machine_reg); 43 case InstructionSet::kX86_64: 44 return Reg::X86_64Core(machine_reg); 45 case InstructionSet::kMips: 46 return Reg::MipsCore(machine_reg); 47 case InstructionSet::kMips64: 48 return Reg::Mips64Core(machine_reg); 49 case InstructionSet::kNone: 50 LOG(FATAL) << "No instruction set"; 51 } 52 UNREACHABLE(); 53 } 54 55 static Reg GetDwarfFpReg(InstructionSet isa, int machine_reg) { 56 switch (isa) { 57 case InstructionSet::kArm: 58 case InstructionSet::kThumb2: 59 return Reg::ArmFp(machine_reg); 60 case InstructionSet::kArm64: 61 return Reg::Arm64Fp(machine_reg); 62 case InstructionSet::kX86: 63 return Reg::X86Fp(machine_reg); 64 case InstructionSet::kX86_64: 65 return Reg::X86_64Fp(machine_reg); 66 case InstructionSet::kMips: 67 return Reg::MipsFp(machine_reg); 68 case InstructionSet::kMips64: 69 return Reg::Mips64Fp(machine_reg); 70 case InstructionSet::kNone: 71 LOG(FATAL) << "No instruction set"; 72 } 73 UNREACHABLE(); 74 } 75 76 struct VariableLocation { 77 uint32_t low_pc; // Relative to compilation unit. 78 uint32_t high_pc; // Relative to compilation unit. 79 DexRegisterLocation reg_lo; // May be None if the location is unknown. 80 DexRegisterLocation reg_hi; // Most significant bits of 64-bit value. 81 }; 82 83 // Get the location of given dex register (e.g. stack or machine register). 84 // Note that the location might be different based on the current pc. 85 // The result will cover all ranges where the variable is in scope. 86 // PCs corresponding to stackmap with dex register map are accurate, 87 // all other PCs are best-effort only. 88 static std::vector<VariableLocation> GetVariableLocations( 89 const MethodDebugInfo* method_info, 90 const std::vector<DexRegisterMap>& dex_register_maps, 91 uint16_t vreg, 92 bool is64bitValue, 93 uint64_t compilation_unit_code_address, 94 uint32_t dex_pc_low, 95 uint32_t dex_pc_high, 96 InstructionSet isa) { 97 std::vector<VariableLocation> variable_locations; 98 99 // Get stack maps sorted by pc (they might not be sorted internally). 100 // TODO(dsrbecky) Remove this once stackmaps get sorted by pc. 101 const CodeInfo code_info(method_info->code_info); 102 const CodeInfoEncoding encoding = code_info.ExtractEncoding(); 103 std::map<uint32_t, uint32_t> stack_maps; // low_pc -> stack_map_index. 104 for (uint32_t s = 0; s < code_info.GetNumberOfStackMaps(encoding); s++) { 105 StackMap stack_map = code_info.GetStackMapAt(s, encoding); 106 DCHECK(stack_map.IsValid()); 107 if (!stack_map.HasDexRegisterMap(encoding.stack_map.encoding)) { 108 // The compiler creates stackmaps without register maps at the start of 109 // basic blocks in order to keep instruction-accurate line number mapping. 110 // However, we never stop at those (breakpoint locations always have map). 111 // Therefore, for the purpose of local variables, we ignore them. 112 // The main reason for this is to save space by avoiding undefined gaps. 113 continue; 114 } 115 const uint32_t pc_offset = stack_map.GetNativePcOffset(encoding.stack_map.encoding, isa); 116 DCHECK_LE(pc_offset, method_info->code_size); 117 DCHECK_LE(compilation_unit_code_address, method_info->code_address); 118 const uint32_t low_pc = dchecked_integral_cast<uint32_t>( 119 method_info->code_address + pc_offset - compilation_unit_code_address); 120 stack_maps.emplace(low_pc, s); 121 } 122 123 // Create entries for the requested register based on stack map data. 124 for (auto it = stack_maps.begin(); it != stack_maps.end(); it++) { 125 const uint32_t low_pc = it->first; 126 const uint32_t stack_map_index = it->second; 127 const StackMap& stack_map = code_info.GetStackMapAt(stack_map_index, encoding); 128 auto next_it = it; 129 next_it++; 130 const uint32_t high_pc = next_it != stack_maps.end() 131 ? next_it->first 132 : method_info->code_address + method_info->code_size - compilation_unit_code_address; 133 DCHECK_LE(low_pc, high_pc); 134 if (low_pc == high_pc) { 135 continue; // Ignore if the address range is empty. 136 } 137 138 // Check that the stack map is in the requested range. 139 uint32_t dex_pc = stack_map.GetDexPc(encoding.stack_map.encoding); 140 if (!(dex_pc_low <= dex_pc && dex_pc < dex_pc_high)) { 141 // The variable is not in scope at this PC. Therefore omit the entry. 142 // Note that this is different to None() entry which means in scope, but unknown location. 143 continue; 144 } 145 146 // Find the location of the dex register. 147 DexRegisterLocation reg_lo = DexRegisterLocation::None(); 148 DexRegisterLocation reg_hi = DexRegisterLocation::None(); 149 DCHECK_LT(stack_map_index, dex_register_maps.size()); 150 DexRegisterMap dex_register_map = dex_register_maps[stack_map_index]; 151 DCHECK(dex_register_map.IsValid()); 152 CodeItemDataAccessor accessor(*method_info->dex_file, method_info->code_item); 153 reg_lo = dex_register_map.GetDexRegisterLocation( 154 vreg, accessor.RegistersSize(), code_info, encoding); 155 if (is64bitValue) { 156 reg_hi = dex_register_map.GetDexRegisterLocation( 157 vreg + 1, accessor.RegistersSize(), code_info, encoding); 158 } 159 160 // Add location entry for this address range. 161 if (!variable_locations.empty() && 162 variable_locations.back().reg_lo == reg_lo && 163 variable_locations.back().reg_hi == reg_hi && 164 variable_locations.back().high_pc == low_pc) { 165 // Merge with the previous entry (extend its range). 166 variable_locations.back().high_pc = high_pc; 167 } else { 168 variable_locations.push_back({low_pc, high_pc, reg_lo, reg_hi}); 169 } 170 } 171 172 return variable_locations; 173 } 174 175 // Write table into .debug_loc which describes location of dex register. 176 // The dex register might be valid only at some points and it might 177 // move between machine registers and stack. 178 static void WriteDebugLocEntry(const MethodDebugInfo* method_info, 179 const std::vector<DexRegisterMap>& dex_register_maps, 180 uint16_t vreg, 181 bool is64bitValue, 182 uint64_t compilation_unit_code_address, 183 uint32_t dex_pc_low, 184 uint32_t dex_pc_high, 185 InstructionSet isa, 186 dwarf::DebugInfoEntryWriter<>* debug_info, 187 std::vector<uint8_t>* debug_loc_buffer, 188 std::vector<uint8_t>* debug_ranges_buffer) { 189 using Kind = DexRegisterLocation::Kind; 190 if (method_info->code_info == nullptr || dex_register_maps.empty()) { 191 return; 192 } 193 194 std::vector<VariableLocation> variable_locations = GetVariableLocations( 195 method_info, 196 dex_register_maps, 197 vreg, 198 is64bitValue, 199 compilation_unit_code_address, 200 dex_pc_low, 201 dex_pc_high, 202 isa); 203 204 // Write .debug_loc entries. 205 dwarf::Writer<> debug_loc(debug_loc_buffer); 206 const size_t debug_loc_offset = debug_loc.size(); 207 const bool is64bit = Is64BitInstructionSet(isa); 208 std::vector<uint8_t> expr_buffer; 209 for (const VariableLocation& variable_location : variable_locations) { 210 // Translate dex register location to DWARF expression. 211 // Note that 64-bit value might be split to two distinct locations. 212 // (for example, two 32-bit machine registers, or even stack and register) 213 dwarf::Expression expr(&expr_buffer); 214 DexRegisterLocation reg_lo = variable_location.reg_lo; 215 DexRegisterLocation reg_hi = variable_location.reg_hi; 216 for (int piece = 0; piece < (is64bitValue ? 2 : 1); piece++) { 217 DexRegisterLocation reg_loc = (piece == 0 ? reg_lo : reg_hi); 218 const Kind kind = reg_loc.GetKind(); 219 const int32_t value = reg_loc.GetValue(); 220 if (kind == Kind::kInStack) { 221 // The stack offset is relative to SP. Make it relative to CFA. 222 expr.WriteOpFbreg(value - method_info->frame_size_in_bytes); 223 if (piece == 0 && reg_hi.GetKind() == Kind::kInStack && 224 reg_hi.GetValue() == value + 4) { 225 break; // the high word is correctly implied by the low word. 226 } 227 } else if (kind == Kind::kInRegister) { 228 expr.WriteOpReg(GetDwarfCoreReg(isa, value).num()); 229 if (piece == 0 && reg_hi.GetKind() == Kind::kInRegisterHigh && 230 reg_hi.GetValue() == value) { 231 break; // the high word is correctly implied by the low word. 232 } 233 } else if (kind == Kind::kInFpuRegister) { 234 if ((isa == InstructionSet::kArm || isa == InstructionSet::kThumb2) && 235 piece == 0 && reg_hi.GetKind() == Kind::kInFpuRegister && 236 reg_hi.GetValue() == value + 1 && value % 2 == 0) { 237 // Translate S register pair to D register (e.g. S4+S5 to D2). 238 expr.WriteOpReg(Reg::ArmDp(value / 2).num()); 239 break; 240 } 241 expr.WriteOpReg(GetDwarfFpReg(isa, value).num()); 242 if (piece == 0 && reg_hi.GetKind() == Kind::kInFpuRegisterHigh && 243 reg_hi.GetValue() == reg_lo.GetValue()) { 244 break; // the high word is correctly implied by the low word. 245 } 246 } else if (kind == Kind::kConstant) { 247 expr.WriteOpConsts(value); 248 expr.WriteOpStackValue(); 249 } else if (kind == Kind::kNone) { 250 break; 251 } else { 252 // kInStackLargeOffset and kConstantLargeValue are hidden by GetKind(). 253 // kInRegisterHigh and kInFpuRegisterHigh should be handled by 254 // the special cases above and they should not occur alone. 255 LOG(WARNING) << "Unexpected register location: " << kind 256 << " (This can indicate either a bug in the dexer when generating" 257 << " local variable information, or a bug in ART compiler." 258 << " Please file a bug at go/art-bug)"; 259 break; 260 } 261 if (is64bitValue) { 262 // Write the marker which is needed by split 64-bit values. 263 // This code is skipped by the special cases. 264 expr.WriteOpPiece(4); 265 } 266 } 267 268 if (expr.size() > 0) { 269 if (is64bit) { 270 debug_loc.PushUint64(variable_location.low_pc); 271 debug_loc.PushUint64(variable_location.high_pc); 272 } else { 273 debug_loc.PushUint32(variable_location.low_pc); 274 debug_loc.PushUint32(variable_location.high_pc); 275 } 276 // Write the expression. 277 debug_loc.PushUint16(expr.size()); 278 debug_loc.PushData(expr.data()); 279 } else { 280 // Do not generate .debug_loc if the location is not known. 281 } 282 } 283 // Write end-of-list entry. 284 if (is64bit) { 285 debug_loc.PushUint64(0); 286 debug_loc.PushUint64(0); 287 } else { 288 debug_loc.PushUint32(0); 289 debug_loc.PushUint32(0); 290 } 291 292 // Write .debug_ranges entries. 293 // This includes ranges where the variable is in scope but the location is not known. 294 dwarf::Writer<> debug_ranges(debug_ranges_buffer); 295 size_t debug_ranges_offset = debug_ranges.size(); 296 for (size_t i = 0; i < variable_locations.size(); i++) { 297 uint32_t low_pc = variable_locations[i].low_pc; 298 uint32_t high_pc = variable_locations[i].high_pc; 299 while (i + 1 < variable_locations.size() && variable_locations[i+1].low_pc == high_pc) { 300 // Merge address range with the next entry. 301 high_pc = variable_locations[++i].high_pc; 302 } 303 if (is64bit) { 304 debug_ranges.PushUint64(low_pc); 305 debug_ranges.PushUint64(high_pc); 306 } else { 307 debug_ranges.PushUint32(low_pc); 308 debug_ranges.PushUint32(high_pc); 309 } 310 } 311 // Write end-of-list entry. 312 if (is64bit) { 313 debug_ranges.PushUint64(0); 314 debug_ranges.PushUint64(0); 315 } else { 316 debug_ranges.PushUint32(0); 317 debug_ranges.PushUint32(0); 318 } 319 320 // Simple de-duplication - check whether this entry is same as the last one (or tail of it). 321 size_t debug_ranges_entry_size = debug_ranges.size() - debug_ranges_offset; 322 if (debug_ranges_offset >= debug_ranges_entry_size) { 323 size_t previous_offset = debug_ranges_offset - debug_ranges_entry_size; 324 if (memcmp(debug_ranges_buffer->data() + previous_offset, 325 debug_ranges_buffer->data() + debug_ranges_offset, 326 debug_ranges_entry_size) == 0) { 327 // Remove what we have just written and use the last entry instead. 328 debug_ranges_buffer->resize(debug_ranges_offset); 329 debug_ranges_offset = previous_offset; 330 } 331 } 332 333 // Write attributes to .debug_info. 334 debug_info->WriteSecOffset(dwarf::DW_AT_location, debug_loc_offset); 335 debug_info->WriteSecOffset(dwarf::DW_AT_start_scope, debug_ranges_offset); 336 } 337 338 } // namespace debug 339 } // namespace art 340 341 #endif // ART_COMPILER_DEBUG_ELF_DEBUG_LOC_WRITER_H_ 342 343
