| /art/runtime/arch/x86/ |
| thread_x86.cc | 32 uint16_t limit0; member in struct:descriptor_table_entry_t
64 entry.limit0 = (limit & 0x0ffff);
|
| /external/libvpx/libvpx/vpx_dsp/mips/ |
| loopfilter_4_msa.c | 47 v16u8 mask, hev, flat, thresh0, b_limit0, limit0, thresh1, b_limit1, limit1; local
61 limit0 = (v16u8)__msa_fill_b(*limit0_ptr);
63 limit0 = (v16u8)__msa_ilvr_d((v2i64)limit1, (v2i64)limit0);
65 LPF_MASK_HEV(p3, p2, p1, p0, q0, q1, q2, q3, limit0, b_limit0, thresh0, hev,
108 v16u8 thresh0, b_limit0, limit0, thresh1, b_limit1, limit1; local
130 limit0 = (v16u8)__msa_fill_b(*limit0_ptr);
132 limit0 = (v16u8)__msa_ilvr_d((v2i64)limit1, (v2i64)limit0);
134 LPF_MASK_HEV(p3, p2, p1, p0, q0, q1, q2, q3, limit0, b_limit0, thresh0, hev
[all...] |
| /external/libvpx/libvpx/vp8/common/mips/msa/ |
| loopfilter_filters_msa.c | 217 v16u8 thresh0, b_limit0, limit0, thresh1, b_limit1, limit1; local
229 limit0 = (v16u8)__msa_fill_b(*limit0_ptr);
231 limit0 = (v16u8)__msa_ilvr_d((v2i64)limit1, (v2i64)limit0);
233 LPF_MASK_HEV(p3, p2, p1, p0, q0, q1, q2, q3, limit0, b_limit0, thresh0, hev,
248 v16u8 thresh0, b_limit0, limit0, thresh1, b_limit1, limit1; local
269 limit0 = (v16u8)__msa_fill_b(*limit0_ptr);
271 limit0 = (v16u8)__msa_ilvr_d((v2i64)limit1, (v2i64)limit0);
273 LPF_MASK_HEV(p3, p2, p1, p0, q0, q1, q2, q3, limit0, b_limit0, thresh0, hev
[all...] |
| /external/webp/src/dsp/ |
| dec_msa.c | 426 const v16u8 limit0 = (v16u8)__msa_fill_b(limit); local
429 LPF_MASK_HEV(p3, p2, p1, p0, q0, q1, q2, q3, limit0, b_limit0, thresh0,
451 const v16u8 limit0 = (v16u8)__msa_fill_b(limit); local
459 LPF_MASK_HEV(p3, p2, p1, p0, q0, q1, q2, q3, limit0, b_limit0, thresh0,
[all...] |
