1 /* Instruction building/extraction support for lm32. -*- C -*- 2 3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. 4 - the resultant file is machine generated, cgen-ibld.in isn't 5 6 Copyright (C) 1996-2016 Free Software Foundation, Inc. 7 8 This file is part of libopcodes. 9 10 This library is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 3, or (at your option) 13 any later version. 14 15 It is distributed in the hope that it will be useful, but WITHOUT 16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 18 License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software Foundation, Inc., 22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 23 24 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 25 Keep that in mind. */ 26 27 #include "sysdep.h" 28 #include <stdio.h> 29 #include "ansidecl.h" 30 #include "dis-asm.h" 31 #include "bfd.h" 32 #include "symcat.h" 33 #include "lm32-desc.h" 34 #include "lm32-opc.h" 35 #include "cgen/basic-modes.h" 36 #include "opintl.h" 37 #include "safe-ctype.h" 38 39 #undef min 40 #define min(a,b) ((a) < (b) ? (a) : (b)) 41 #undef max 42 #define max(a,b) ((a) > (b) ? (a) : (b)) 43 44 /* Used by the ifield rtx function. */ 45 #define FLD(f) (fields->f) 46 47 static const char * insert_normal 48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, 49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); 50 static const char * insert_insn_normal 51 (CGEN_CPU_DESC, const CGEN_INSN *, 52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 53 static int extract_normal 54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, 55 unsigned int, unsigned int, unsigned int, unsigned int, 56 unsigned int, unsigned int, bfd_vma, long *); 57 static int extract_insn_normal 58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, 59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 60 #if CGEN_INT_INSN_P 61 static void put_insn_int_value 62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); 63 #endif 64 #if ! CGEN_INT_INSN_P 65 static CGEN_INLINE void insert_1 66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); 67 static CGEN_INLINE int fill_cache 68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); 69 static CGEN_INLINE long extract_1 70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); 71 #endif 72 73 /* Operand insertion. */ 75 76 #if ! CGEN_INT_INSN_P 77 78 /* Subroutine of insert_normal. */ 79 80 static CGEN_INLINE void 81 insert_1 (CGEN_CPU_DESC cd, 82 unsigned long value, 83 int start, 84 int length, 85 int word_length, 86 unsigned char *bufp) 87 { 88 unsigned long x,mask; 89 int shift; 90 91 x = cgen_get_insn_value (cd, bufp, word_length); 92 93 /* Written this way to avoid undefined behaviour. */ 94 mask = (((1L << (length - 1)) - 1) << 1) | 1; 95 if (CGEN_INSN_LSB0_P) 96 shift = (start + 1) - length; 97 else 98 shift = (word_length - (start + length)); 99 x = (x & ~(mask << shift)) | ((value & mask) << shift); 100 101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x); 102 } 103 104 #endif /* ! CGEN_INT_INSN_P */ 105 106 /* Default insertion routine. 107 108 ATTRS is a mask of the boolean attributes. 109 WORD_OFFSET is the offset in bits from the start of the insn of the value. 110 WORD_LENGTH is the length of the word in bits in which the value resides. 111 START is the starting bit number in the word, architecture origin. 112 LENGTH is the length of VALUE in bits. 113 TOTAL_LENGTH is the total length of the insn in bits. 114 115 The result is an error message or NULL if success. */ 116 117 /* ??? This duplicates functionality with bfd's howto table and 118 bfd_install_relocation. */ 119 /* ??? This doesn't handle bfd_vma's. Create another function when 120 necessary. */ 121 122 static const char * 123 insert_normal (CGEN_CPU_DESC cd, 124 long value, 125 unsigned int attrs, 126 unsigned int word_offset, 127 unsigned int start, 128 unsigned int length, 129 unsigned int word_length, 130 unsigned int total_length, 131 CGEN_INSN_BYTES_PTR buffer) 132 { 133 static char errbuf[100]; 134 /* Written this way to avoid undefined behaviour. */ 135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1; 136 137 /* If LENGTH is zero, this operand doesn't contribute to the value. */ 138 if (length == 0) 139 return NULL; 140 141 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 142 abort (); 143 144 /* For architectures with insns smaller than the base-insn-bitsize, 145 word_length may be too big. */ 146 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 147 { 148 if (word_offset == 0 149 && word_length > total_length) 150 word_length = total_length; 151 } 152 153 /* Ensure VALUE will fit. */ 154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) 155 { 156 long minval = - (1L << (length - 1)); 157 unsigned long maxval = mask; 158 159 if ((value > 0 && (unsigned long) value > maxval) 160 || value < minval) 161 { 162 /* xgettext:c-format */ 163 sprintf (errbuf, 164 _("operand out of range (%ld not between %ld and %lu)"), 165 value, minval, maxval); 166 return errbuf; 167 } 168 } 169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) 170 { 171 unsigned long maxval = mask; 172 unsigned long val = (unsigned long) value; 173 174 /* For hosts with a word size > 32 check to see if value has been sign 175 extended beyond 32 bits. If so then ignore these higher sign bits 176 as the user is attempting to store a 32-bit signed value into an 177 unsigned 32-bit field which is allowed. */ 178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) 179 val &= 0xFFFFFFFF; 180 181 if (val > maxval) 182 { 183 /* xgettext:c-format */ 184 sprintf (errbuf, 185 _("operand out of range (0x%lx not between 0 and 0x%lx)"), 186 val, maxval); 187 return errbuf; 188 } 189 } 190 else 191 { 192 if (! cgen_signed_overflow_ok_p (cd)) 193 { 194 long minval = - (1L << (length - 1)); 195 long maxval = (1L << (length - 1)) - 1; 196 197 if (value < minval || value > maxval) 198 { 199 sprintf 200 /* xgettext:c-format */ 201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"), 202 value, minval, maxval); 203 return errbuf; 204 } 205 } 206 } 207 208 #if CGEN_INT_INSN_P 209 210 { 211 int shift_within_word, shift_to_word, shift; 212 213 /* How to shift the value to BIT0 of the word. */ 214 shift_to_word = total_length - (word_offset + word_length); 215 216 /* How to shift the value to the field within the word. */ 217 if (CGEN_INSN_LSB0_P) 218 shift_within_word = start + 1 - length; 219 else 220 shift_within_word = word_length - start - length; 221 222 /* The total SHIFT, then mask in the value. */ 223 shift = shift_to_word + shift_within_word; 224 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); 225 } 226 227 #else /* ! CGEN_INT_INSN_P */ 228 229 { 230 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; 231 232 insert_1 (cd, value, start, length, word_length, bufp); 233 } 234 235 #endif /* ! CGEN_INT_INSN_P */ 236 237 return NULL; 238 } 239 240 /* Default insn builder (insert handler). 241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning 242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is 243 recorded in host byte order, otherwise BUFFER is an array of bytes 244 and the value is recorded in target byte order). 245 The result is an error message or NULL if success. */ 246 247 static const char * 248 insert_insn_normal (CGEN_CPU_DESC cd, 249 const CGEN_INSN * insn, 250 CGEN_FIELDS * fields, 251 CGEN_INSN_BYTES_PTR buffer, 252 bfd_vma pc) 253 { 254 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 255 unsigned long value; 256 const CGEN_SYNTAX_CHAR_TYPE * syn; 257 258 CGEN_INIT_INSERT (cd); 259 value = CGEN_INSN_BASE_VALUE (insn); 260 261 /* If we're recording insns as numbers (rather than a string of bytes), 262 target byte order handling is deferred until later. */ 263 264 #if CGEN_INT_INSN_P 265 266 put_insn_int_value (cd, buffer, cd->base_insn_bitsize, 267 CGEN_FIELDS_BITSIZE (fields), value); 268 269 #else 270 271 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, 272 (unsigned) CGEN_FIELDS_BITSIZE (fields)), 273 value); 274 275 #endif /* ! CGEN_INT_INSN_P */ 276 277 /* ??? It would be better to scan the format's fields. 278 Still need to be able to insert a value based on the operand though; 279 e.g. storing a branch displacement that got resolved later. 280 Needs more thought first. */ 281 282 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) 283 { 284 const char *errmsg; 285 286 if (CGEN_SYNTAX_CHAR_P (* syn)) 287 continue; 288 289 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 290 fields, buffer, pc); 291 if (errmsg) 292 return errmsg; 293 } 294 295 return NULL; 296 } 297 298 #if CGEN_INT_INSN_P 299 /* Cover function to store an insn value into an integral insn. Must go here 300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ 301 302 static void 303 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 304 CGEN_INSN_BYTES_PTR buf, 305 int length, 306 int insn_length, 307 CGEN_INSN_INT value) 308 { 309 /* For architectures with insns smaller than the base-insn-bitsize, 310 length may be too big. */ 311 if (length > insn_length) 312 *buf = value; 313 else 314 { 315 int shift = insn_length - length; 316 /* Written this way to avoid undefined behaviour. */ 317 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1; 318 319 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); 320 } 321 } 322 #endif 323 324 /* Operand extraction. */ 326 327 #if ! CGEN_INT_INSN_P 328 329 /* Subroutine of extract_normal. 330 Ensure sufficient bytes are cached in EX_INFO. 331 OFFSET is the offset in bytes from the start of the insn of the value. 332 BYTES is the length of the needed value. 333 Returns 1 for success, 0 for failure. */ 334 335 static CGEN_INLINE int 336 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 337 CGEN_EXTRACT_INFO *ex_info, 338 int offset, 339 int bytes, 340 bfd_vma pc) 341 { 342 /* It's doubtful that the middle part has already been fetched so 343 we don't optimize that case. kiss. */ 344 unsigned int mask; 345 disassemble_info *info = (disassemble_info *) ex_info->dis_info; 346 347 /* First do a quick check. */ 348 mask = (1 << bytes) - 1; 349 if (((ex_info->valid >> offset) & mask) == mask) 350 return 1; 351 352 /* Search for the first byte we need to read. */ 353 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) 354 if (! (mask & ex_info->valid)) 355 break; 356 357 if (bytes) 358 { 359 int status; 360 361 pc += offset; 362 status = (*info->read_memory_func) 363 (pc, ex_info->insn_bytes + offset, bytes, info); 364 365 if (status != 0) 366 { 367 (*info->memory_error_func) (status, pc, info); 368 return 0; 369 } 370 371 ex_info->valid |= ((1 << bytes) - 1) << offset; 372 } 373 374 return 1; 375 } 376 377 /* Subroutine of extract_normal. */ 378 379 static CGEN_INLINE long 380 extract_1 (CGEN_CPU_DESC cd, 381 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 382 int start, 383 int length, 384 int word_length, 385 unsigned char *bufp, 386 bfd_vma pc ATTRIBUTE_UNUSED) 387 { 388 unsigned long x; 389 int shift; 390 391 x = cgen_get_insn_value (cd, bufp, word_length); 392 393 if (CGEN_INSN_LSB0_P) 394 shift = (start + 1) - length; 395 else 396 shift = (word_length - (start + length)); 397 return x >> shift; 398 } 399 400 #endif /* ! CGEN_INT_INSN_P */ 401 402 /* Default extraction routine. 403 404 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, 405 or sometimes less for cases like the m32r where the base insn size is 32 406 but some insns are 16 bits. 407 ATTRS is a mask of the boolean attributes. We only need `SIGNED', 408 but for generality we take a bitmask of all of them. 409 WORD_OFFSET is the offset in bits from the start of the insn of the value. 410 WORD_LENGTH is the length of the word in bits in which the value resides. 411 START is the starting bit number in the word, architecture origin. 412 LENGTH is the length of VALUE in bits. 413 TOTAL_LENGTH is the total length of the insn in bits. 414 415 Returns 1 for success, 0 for failure. */ 416 417 /* ??? The return code isn't properly used. wip. */ 418 419 /* ??? This doesn't handle bfd_vma's. Create another function when 420 necessary. */ 421 422 static int 423 extract_normal (CGEN_CPU_DESC cd, 424 #if ! CGEN_INT_INSN_P 425 CGEN_EXTRACT_INFO *ex_info, 426 #else 427 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 428 #endif 429 CGEN_INSN_INT insn_value, 430 unsigned int attrs, 431 unsigned int word_offset, 432 unsigned int start, 433 unsigned int length, 434 unsigned int word_length, 435 unsigned int total_length, 436 #if ! CGEN_INT_INSN_P 437 bfd_vma pc, 438 #else 439 bfd_vma pc ATTRIBUTE_UNUSED, 440 #endif 441 long *valuep) 442 { 443 long value, mask; 444 445 /* If LENGTH is zero, this operand doesn't contribute to the value 446 so give it a standard value of zero. */ 447 if (length == 0) 448 { 449 *valuep = 0; 450 return 1; 451 } 452 453 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 454 abort (); 455 456 /* For architectures with insns smaller than the insn-base-bitsize, 457 word_length may be too big. */ 458 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 459 { 460 if (word_offset + word_length > total_length) 461 word_length = total_length - word_offset; 462 } 463 464 /* Does the value reside in INSN_VALUE, and at the right alignment? */ 465 466 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) 467 { 468 if (CGEN_INSN_LSB0_P) 469 value = insn_value >> ((word_offset + start + 1) - length); 470 else 471 value = insn_value >> (total_length - ( word_offset + start + length)); 472 } 473 474 #if ! CGEN_INT_INSN_P 475 476 else 477 { 478 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; 479 480 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 481 abort (); 482 483 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) 484 return 0; 485 486 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); 487 } 488 489 #endif /* ! CGEN_INT_INSN_P */ 490 491 /* Written this way to avoid undefined behaviour. */ 492 mask = (((1L << (length - 1)) - 1) << 1) | 1; 493 494 value &= mask; 495 /* sign extend? */ 496 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) 497 && (value & (1L << (length - 1)))) 498 value |= ~mask; 499 500 *valuep = value; 501 502 return 1; 503 } 504 505 /* Default insn extractor. 506 507 INSN_VALUE is the first base_insn_bitsize bits, translated to host order. 508 The extracted fields are stored in FIELDS. 509 EX_INFO is used to handle reading variable length insns. 510 Return the length of the insn in bits, or 0 if no match, 511 or -1 if an error occurs fetching data (memory_error_func will have 512 been called). */ 513 514 static int 515 extract_insn_normal (CGEN_CPU_DESC cd, 516 const CGEN_INSN *insn, 517 CGEN_EXTRACT_INFO *ex_info, 518 CGEN_INSN_INT insn_value, 519 CGEN_FIELDS *fields, 520 bfd_vma pc) 521 { 522 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 523 const CGEN_SYNTAX_CHAR_TYPE *syn; 524 525 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); 526 527 CGEN_INIT_EXTRACT (cd); 528 529 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 530 { 531 int length; 532 533 if (CGEN_SYNTAX_CHAR_P (*syn)) 534 continue; 535 536 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 537 ex_info, insn_value, fields, pc); 538 if (length <= 0) 539 return length; 540 } 541 542 /* We recognized and successfully extracted this insn. */ 543 return CGEN_INSN_BITSIZE (insn); 544 } 545 546 /* Machine generated code added here. */ 548 549 const char * lm32_cgen_insert_operand 550 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 551 552 /* Main entry point for operand insertion. 553 554 This function is basically just a big switch statement. Earlier versions 555 used tables to look up the function to use, but 556 - if the table contains both assembler and disassembler functions then 557 the disassembler contains much of the assembler and vice-versa, 558 - there's a lot of inlining possibilities as things grow, 559 - using a switch statement avoids the function call overhead. 560 561 This function could be moved into `parse_insn_normal', but keeping it 562 separate makes clear the interface between `parse_insn_normal' and each of 563 the handlers. It's also needed by GAS to insert operands that couldn't be 564 resolved during parsing. */ 565 566 const char * 567 lm32_cgen_insert_operand (CGEN_CPU_DESC cd, 568 int opindex, 569 CGEN_FIELDS * fields, 570 CGEN_INSN_BYTES_PTR buffer, 571 bfd_vma pc ATTRIBUTE_UNUSED) 572 { 573 const char * errmsg = NULL; 574 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 575 576 switch (opindex) 577 { 578 case LM32_OPERAND_BRANCH : 579 { 580 long value = fields->f_branch; 581 value = ((SI) (((value) - (pc))) >> (2)); 582 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, buffer); 583 } 584 break; 585 case LM32_OPERAND_CALL : 586 { 587 long value = fields->f_call; 588 value = ((SI) (((value) - (pc))) >> (2)); 589 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, buffer); 590 } 591 break; 592 case LM32_OPERAND_CSR : 593 errmsg = insert_normal (cd, fields->f_csr, 0, 0, 25, 5, 32, total_length, buffer); 594 break; 595 case LM32_OPERAND_EXCEPTION : 596 errmsg = insert_normal (cd, fields->f_exception, 0, 0, 25, 26, 32, total_length, buffer); 597 break; 598 case LM32_OPERAND_GOT16 : 599 errmsg = insert_normal (cd, fields->f_imm, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer); 600 break; 601 case LM32_OPERAND_GOTOFFHI16 : 602 errmsg = insert_normal (cd, fields->f_imm, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer); 603 break; 604 case LM32_OPERAND_GOTOFFLO16 : 605 errmsg = insert_normal (cd, fields->f_imm, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer); 606 break; 607 case LM32_OPERAND_GP16 : 608 errmsg = insert_normal (cd, fields->f_imm, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer); 609 break; 610 case LM32_OPERAND_HI16 : 611 errmsg = insert_normal (cd, fields->f_uimm, 0, 0, 15, 16, 32, total_length, buffer); 612 break; 613 case LM32_OPERAND_IMM : 614 errmsg = insert_normal (cd, fields->f_imm, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer); 615 break; 616 case LM32_OPERAND_LO16 : 617 errmsg = insert_normal (cd, fields->f_uimm, 0, 0, 15, 16, 32, total_length, buffer); 618 break; 619 case LM32_OPERAND_R0 : 620 errmsg = insert_normal (cd, fields->f_r0, 0, 0, 25, 5, 32, total_length, buffer); 621 break; 622 case LM32_OPERAND_R1 : 623 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 20, 5, 32, total_length, buffer); 624 break; 625 case LM32_OPERAND_R2 : 626 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 15, 5, 32, total_length, buffer); 627 break; 628 case LM32_OPERAND_SHIFT : 629 errmsg = insert_normal (cd, fields->f_shift, 0, 0, 4, 5, 32, total_length, buffer); 630 break; 631 case LM32_OPERAND_UIMM : 632 errmsg = insert_normal (cd, fields->f_uimm, 0, 0, 15, 16, 32, total_length, buffer); 633 break; 634 case LM32_OPERAND_USER : 635 errmsg = insert_normal (cd, fields->f_user, 0, 0, 10, 11, 32, total_length, buffer); 636 break; 637 638 default : 639 /* xgettext:c-format */ 640 fprintf (stderr, _("Unrecognized field %d while building insn.\n"), 641 opindex); 642 abort (); 643 } 644 645 return errmsg; 646 } 647 648 int lm32_cgen_extract_operand 649 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 650 651 /* Main entry point for operand extraction. 652 The result is <= 0 for error, >0 for success. 653 ??? Actual values aren't well defined right now. 654 655 This function is basically just a big switch statement. Earlier versions 656 used tables to look up the function to use, but 657 - if the table contains both assembler and disassembler functions then 658 the disassembler contains much of the assembler and vice-versa, 659 - there's a lot of inlining possibilities as things grow, 660 - using a switch statement avoids the function call overhead. 661 662 This function could be moved into `print_insn_normal', but keeping it 663 separate makes clear the interface between `print_insn_normal' and each of 664 the handlers. */ 665 666 int 667 lm32_cgen_extract_operand (CGEN_CPU_DESC cd, 668 int opindex, 669 CGEN_EXTRACT_INFO *ex_info, 670 CGEN_INSN_INT insn_value, 671 CGEN_FIELDS * fields, 672 bfd_vma pc) 673 { 674 /* Assume success (for those operands that are nops). */ 675 int length = 1; 676 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 677 678 switch (opindex) 679 { 680 case LM32_OPERAND_BRANCH : 681 { 682 long value; 683 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, pc, & value); 684 value = ((pc) + (((SI) (((value) << (16))) >> (14)))); 685 fields->f_branch = value; 686 } 687 break; 688 case LM32_OPERAND_CALL : 689 { 690 long value; 691 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, pc, & value); 692 value = ((pc) + (((SI) (((value) << (6))) >> (4)))); 693 fields->f_call = value; 694 } 695 break; 696 case LM32_OPERAND_CSR : 697 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_csr); 698 break; 699 case LM32_OPERAND_EXCEPTION : 700 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 26, 32, total_length, pc, & fields->f_exception); 701 break; 702 case LM32_OPERAND_GOT16 : 703 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & fields->f_imm); 704 break; 705 case LM32_OPERAND_GOTOFFHI16 : 706 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & fields->f_imm); 707 break; 708 case LM32_OPERAND_GOTOFFLO16 : 709 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & fields->f_imm); 710 break; 711 case LM32_OPERAND_GP16 : 712 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & fields->f_imm); 713 break; 714 case LM32_OPERAND_HI16 : 715 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_uimm); 716 break; 717 case LM32_OPERAND_IMM : 718 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & fields->f_imm); 719 break; 720 case LM32_OPERAND_LO16 : 721 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_uimm); 722 break; 723 case LM32_OPERAND_R0 : 724 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r0); 725 break; 726 case LM32_OPERAND_R1 : 727 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_r1); 728 break; 729 case LM32_OPERAND_R2 : 730 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_r2); 731 break; 732 case LM32_OPERAND_SHIFT : 733 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 5, 32, total_length, pc, & fields->f_shift); 734 break; 735 case LM32_OPERAND_UIMM : 736 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_uimm); 737 break; 738 case LM32_OPERAND_USER : 739 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 11, 32, total_length, pc, & fields->f_user); 740 break; 741 742 default : 743 /* xgettext:c-format */ 744 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"), 745 opindex); 746 abort (); 747 } 748 749 return length; 750 } 751 752 cgen_insert_fn * const lm32_cgen_insert_handlers[] = 753 { 754 insert_insn_normal, 755 }; 756 757 cgen_extract_fn * const lm32_cgen_extract_handlers[] = 758 { 759 extract_insn_normal, 760 }; 761 762 int lm32_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 763 bfd_vma lm32_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 764 765 /* Getting values from cgen_fields is handled by a collection of functions. 766 They are distinguished by the type of the VALUE argument they return. 767 TODO: floating point, inlining support, remove cases where result type 768 not appropriate. */ 769 770 int 771 lm32_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 772 int opindex, 773 const CGEN_FIELDS * fields) 774 { 775 int value; 776 777 switch (opindex) 778 { 779 case LM32_OPERAND_BRANCH : 780 value = fields->f_branch; 781 break; 782 case LM32_OPERAND_CALL : 783 value = fields->f_call; 784 break; 785 case LM32_OPERAND_CSR : 786 value = fields->f_csr; 787 break; 788 case LM32_OPERAND_EXCEPTION : 789 value = fields->f_exception; 790 break; 791 case LM32_OPERAND_GOT16 : 792 value = fields->f_imm; 793 break; 794 case LM32_OPERAND_GOTOFFHI16 : 795 value = fields->f_imm; 796 break; 797 case LM32_OPERAND_GOTOFFLO16 : 798 value = fields->f_imm; 799 break; 800 case LM32_OPERAND_GP16 : 801 value = fields->f_imm; 802 break; 803 case LM32_OPERAND_HI16 : 804 value = fields->f_uimm; 805 break; 806 case LM32_OPERAND_IMM : 807 value = fields->f_imm; 808 break; 809 case LM32_OPERAND_LO16 : 810 value = fields->f_uimm; 811 break; 812 case LM32_OPERAND_R0 : 813 value = fields->f_r0; 814 break; 815 case LM32_OPERAND_R1 : 816 value = fields->f_r1; 817 break; 818 case LM32_OPERAND_R2 : 819 value = fields->f_r2; 820 break; 821 case LM32_OPERAND_SHIFT : 822 value = fields->f_shift; 823 break; 824 case LM32_OPERAND_UIMM : 825 value = fields->f_uimm; 826 break; 827 case LM32_OPERAND_USER : 828 value = fields->f_user; 829 break; 830 831 default : 832 /* xgettext:c-format */ 833 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"), 834 opindex); 835 abort (); 836 } 837 838 return value; 839 } 840 841 bfd_vma 842 lm32_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 843 int opindex, 844 const CGEN_FIELDS * fields) 845 { 846 bfd_vma value; 847 848 switch (opindex) 849 { 850 case LM32_OPERAND_BRANCH : 851 value = fields->f_branch; 852 break; 853 case LM32_OPERAND_CALL : 854 value = fields->f_call; 855 break; 856 case LM32_OPERAND_CSR : 857 value = fields->f_csr; 858 break; 859 case LM32_OPERAND_EXCEPTION : 860 value = fields->f_exception; 861 break; 862 case LM32_OPERAND_GOT16 : 863 value = fields->f_imm; 864 break; 865 case LM32_OPERAND_GOTOFFHI16 : 866 value = fields->f_imm; 867 break; 868 case LM32_OPERAND_GOTOFFLO16 : 869 value = fields->f_imm; 870 break; 871 case LM32_OPERAND_GP16 : 872 value = fields->f_imm; 873 break; 874 case LM32_OPERAND_HI16 : 875 value = fields->f_uimm; 876 break; 877 case LM32_OPERAND_IMM : 878 value = fields->f_imm; 879 break; 880 case LM32_OPERAND_LO16 : 881 value = fields->f_uimm; 882 break; 883 case LM32_OPERAND_R0 : 884 value = fields->f_r0; 885 break; 886 case LM32_OPERAND_R1 : 887 value = fields->f_r1; 888 break; 889 case LM32_OPERAND_R2 : 890 value = fields->f_r2; 891 break; 892 case LM32_OPERAND_SHIFT : 893 value = fields->f_shift; 894 break; 895 case LM32_OPERAND_UIMM : 896 value = fields->f_uimm; 897 break; 898 case LM32_OPERAND_USER : 899 value = fields->f_user; 900 break; 901 902 default : 903 /* xgettext:c-format */ 904 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"), 905 opindex); 906 abort (); 907 } 908 909 return value; 910 } 911 912 void lm32_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int); 913 void lm32_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma); 914 915 /* Stuffing values in cgen_fields is handled by a collection of functions. 916 They are distinguished by the type of the VALUE argument they accept. 917 TODO: floating point, inlining support, remove cases where argument type 918 not appropriate. */ 919 920 void 921 lm32_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 922 int opindex, 923 CGEN_FIELDS * fields, 924 int value) 925 { 926 switch (opindex) 927 { 928 case LM32_OPERAND_BRANCH : 929 fields->f_branch = value; 930 break; 931 case LM32_OPERAND_CALL : 932 fields->f_call = value; 933 break; 934 case LM32_OPERAND_CSR : 935 fields->f_csr = value; 936 break; 937 case LM32_OPERAND_EXCEPTION : 938 fields->f_exception = value; 939 break; 940 case LM32_OPERAND_GOT16 : 941 fields->f_imm = value; 942 break; 943 case LM32_OPERAND_GOTOFFHI16 : 944 fields->f_imm = value; 945 break; 946 case LM32_OPERAND_GOTOFFLO16 : 947 fields->f_imm = value; 948 break; 949 case LM32_OPERAND_GP16 : 950 fields->f_imm = value; 951 break; 952 case LM32_OPERAND_HI16 : 953 fields->f_uimm = value; 954 break; 955 case LM32_OPERAND_IMM : 956 fields->f_imm = value; 957 break; 958 case LM32_OPERAND_LO16 : 959 fields->f_uimm = value; 960 break; 961 case LM32_OPERAND_R0 : 962 fields->f_r0 = value; 963 break; 964 case LM32_OPERAND_R1 : 965 fields->f_r1 = value; 966 break; 967 case LM32_OPERAND_R2 : 968 fields->f_r2 = value; 969 break; 970 case LM32_OPERAND_SHIFT : 971 fields->f_shift = value; 972 break; 973 case LM32_OPERAND_UIMM : 974 fields->f_uimm = value; 975 break; 976 case LM32_OPERAND_USER : 977 fields->f_user = value; 978 break; 979 980 default : 981 /* xgettext:c-format */ 982 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"), 983 opindex); 984 abort (); 985 } 986 } 987 988 void 989 lm32_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 990 int opindex, 991 CGEN_FIELDS * fields, 992 bfd_vma value) 993 { 994 switch (opindex) 995 { 996 case LM32_OPERAND_BRANCH : 997 fields->f_branch = value; 998 break; 999 case LM32_OPERAND_CALL : 1000 fields->f_call = value; 1001 break; 1002 case LM32_OPERAND_CSR : 1003 fields->f_csr = value; 1004 break; 1005 case LM32_OPERAND_EXCEPTION : 1006 fields->f_exception = value; 1007 break; 1008 case LM32_OPERAND_GOT16 : 1009 fields->f_imm = value; 1010 break; 1011 case LM32_OPERAND_GOTOFFHI16 : 1012 fields->f_imm = value; 1013 break; 1014 case LM32_OPERAND_GOTOFFLO16 : 1015 fields->f_imm = value; 1016 break; 1017 case LM32_OPERAND_GP16 : 1018 fields->f_imm = value; 1019 break; 1020 case LM32_OPERAND_HI16 : 1021 fields->f_uimm = value; 1022 break; 1023 case LM32_OPERAND_IMM : 1024 fields->f_imm = value; 1025 break; 1026 case LM32_OPERAND_LO16 : 1027 fields->f_uimm = value; 1028 break; 1029 case LM32_OPERAND_R0 : 1030 fields->f_r0 = value; 1031 break; 1032 case LM32_OPERAND_R1 : 1033 fields->f_r1 = value; 1034 break; 1035 case LM32_OPERAND_R2 : 1036 fields->f_r2 = value; 1037 break; 1038 case LM32_OPERAND_SHIFT : 1039 fields->f_shift = value; 1040 break; 1041 case LM32_OPERAND_UIMM : 1042 fields->f_uimm = value; 1043 break; 1044 case LM32_OPERAND_USER : 1045 fields->f_user = value; 1046 break; 1047 1048 default : 1049 /* xgettext:c-format */ 1050 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"), 1051 opindex); 1052 abort (); 1053 } 1054 } 1055 1056 /* Function to call before using the instruction builder tables. */ 1057 1058 void 1059 lm32_cgen_init_ibld_table (CGEN_CPU_DESC cd) 1060 { 1061 cd->insert_handlers = & lm32_cgen_insert_handlers[0]; 1062 cd->extract_handlers = & lm32_cgen_extract_handlers[0]; 1063 1064 cd->insert_operand = lm32_cgen_insert_operand; 1065 cd->extract_operand = lm32_cgen_extract_operand; 1066 1067 cd->get_int_operand = lm32_cgen_get_int_operand; 1068 cd->set_int_operand = lm32_cgen_set_int_operand; 1069 cd->get_vma_operand = lm32_cgen_get_vma_operand; 1070 cd->set_vma_operand = lm32_cgen_set_vma_operand; 1071 } 1072
