| /external/llvm/test/MC/Mips/ |
| hex-immediates.s | 11 lui $2, 2 label
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/iq2000/ |
| allinsn.s | 544 .global lui
545 lui: label
546 lui %0,-1
|
| /external/swiftshader/third_party/subzero/src/ |
| IceAssemblerMIPS32.cpp | 665 void AssemblerMIPS32::lui(const Operand *OpRt, const Operand *OpImm, function in class:Ice::MIPS32::AssemblerMIPS32
668 const IValueT Rt = encodeGPRegister(OpRt, "Rt", "lui");
676 llvm::report_fatal_error("lui: Invalid 2nd operand");
[all...] |
| /external/v8/src/mips/ |
| assembler-mips.cc | 182 // specially coded on MIPS means that it is a lui/ori instruction, and that is
614 return opcode == LUI;
747 // Use just lui and jic instructions. Insert lower part of the target address in
751 // in jic register with lui instruction.
1949 void Assembler::lui(Register rd, int32_t j) { function in class:v8::Assembler
[all...] |
| /external/v8/src/mips64/ |
| assembler-mips64.cc | 160 // specially coded on MIPS means that it is a lui/ori instruction, and that is
586 return opcode == LUI;
2118 void Assembler::lui(Register rd, int32_t j) { function in class:v8::internal::Assembler
[all...] |
