1 /* Disassemble AVR instructions. 2 Copyright (C) 1999-2016 Free Software Foundation, Inc. 3 4 Contributed by Denis Chertykov <denisc (at) overta.ru> 5 6 This file is part of libopcodes. 7 8 This library is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3, or (at your option) 11 any later version. 12 13 It is distributed in the hope that it will be useful, but WITHOUT 14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 16 License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program; if not, write to the Free Software 20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 21 MA 02110-1301, USA. */ 22 23 #include "sysdep.h" 24 #include <assert.h> 25 #include "dis-asm.h" 26 #include "opintl.h" 27 #include "libiberty.h" 28 29 struct avr_opcodes_s 30 { 31 char *name; 32 char *constraints; 33 char *opcode; 34 int insn_size; /* In words. */ 35 int isa; 36 unsigned int bin_opcode; 37 }; 38 39 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ 40 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN}, 41 42 const struct avr_opcodes_s avr_opcodes[] = 43 { 44 #include "opcode/avr.h" 45 {NULL, NULL, NULL, 0, 0, 0} 46 }; 47 48 static const char * comment_start = "0x"; 49 50 static int 51 avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint, 52 char *opcode_str, char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr) 53 { 54 int ok = 1; 55 *sym = 0; 56 57 switch (constraint) 58 { 59 /* Any register operand. */ 60 case 'r': 61 if (regs) 62 insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* Source register. */ 63 else 64 insn = (insn & 0x01f0) >> 4; /* Destination register. */ 65 66 sprintf (buf, "r%d", insn); 67 break; 68 69 case 'd': 70 if (regs) 71 sprintf (buf, "r%d", 16 + (insn & 0xf)); 72 else 73 sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4)); 74 break; 75 76 case 'w': 77 sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3)); 78 break; 79 80 case 'a': 81 if (regs) 82 sprintf (buf, "r%d", 16 + (insn & 7)); 83 else 84 sprintf (buf, "r%d", 16 + ((insn >> 4) & 7)); 85 break; 86 87 case 'v': 88 if (regs) 89 sprintf (buf, "r%d", (insn & 0xf) * 2); 90 else 91 sprintf (buf, "r%d", ((insn & 0xf0) >> 3)); 92 break; 93 94 case 'e': 95 { 96 char *xyz; 97 98 switch (insn & 0x100f) 99 { 100 case 0x0000: xyz = "Z"; break; 101 case 0x1001: xyz = "Z+"; break; 102 case 0x1002: xyz = "-Z"; break; 103 case 0x0008: xyz = "Y"; break; 104 case 0x1009: xyz = "Y+"; break; 105 case 0x100a: xyz = "-Y"; break; 106 case 0x100c: xyz = "X"; break; 107 case 0x100d: xyz = "X+"; break; 108 case 0x100e: xyz = "-X"; break; 109 default: xyz = "??"; ok = 0; 110 } 111 strcpy (buf, xyz); 112 113 if (AVR_UNDEF_P (insn)) 114 sprintf (comment, _("undefined")); 115 } 116 break; 117 118 case 'z': 119 *buf++ = 'Z'; 120 121 /* Check for post-increment. */ 122 char *s; 123 for (s = opcode_str; *s; ++s) 124 { 125 if (*s == '+') 126 { 127 if (insn & (1 << (15 - (s - opcode_str)))) 128 *buf++ = '+'; 129 break; 130 } 131 } 132 133 *buf = '\0'; 134 if (AVR_UNDEF_P (insn)) 135 sprintf (comment, _("undefined")); 136 break; 137 138 case 'b': 139 { 140 unsigned int x; 141 142 x = (insn & 7); 143 x |= (insn >> 7) & (3 << 3); 144 x |= (insn >> 8) & (1 << 5); 145 146 if (insn & 0x8) 147 *buf++ = 'Y'; 148 else 149 *buf++ = 'Z'; 150 sprintf (buf, "+%d", x); 151 sprintf (comment, "0x%02x", x); 152 } 153 break; 154 155 case 'h': 156 *sym = 1; 157 *sym_addr = ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2; 158 /* See PR binutils/2454. Ideally we would like to display the hex 159 value of the address only once, but this would mean recoding 160 objdump_print_address() which would affect many targets. */ 161 sprintf (buf, "%#lx", (unsigned long) *sym_addr); 162 strcpy (comment, comment_start); 163 break; 164 165 case 'L': 166 { 167 int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2; 168 sprintf (buf, ".%+-8d", rel_addr); 169 *sym = 1; 170 *sym_addr = pc + 2 + rel_addr; 171 strcpy (comment, comment_start); 172 } 173 break; 174 175 case 'l': 176 { 177 int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2; 178 179 sprintf (buf, ".%+-8d", rel_addr); 180 *sym = 1; 181 *sym_addr = pc + 2 + rel_addr; 182 strcpy (comment, comment_start); 183 } 184 break; 185 186 case 'i': 187 { 188 unsigned int val = insn2 | 0x800000; 189 *sym = 1; 190 *sym_addr = val; 191 sprintf (buf, "0x%04X", insn2); 192 strcpy (comment, comment_start); 193 } 194 break; 195 196 case 'j': 197 { 198 unsigned int val = ((insn & 0xf) | ((insn & 0x600) >> 5) 199 | ((insn & 0x100) >> 2)); 200 *sym = 1; 201 *sym_addr = val | 0x800000; 202 sprintf (buf, "0x%02x", val); 203 strcpy (comment, comment_start); 204 } 205 break; 206 207 case 'M': 208 sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf)); 209 sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf)); 210 break; 211 212 case 'n': 213 sprintf (buf, "??"); 214 fprintf (stderr, _("Internal disassembler error")); 215 ok = 0; 216 break; 217 218 case 'K': 219 { 220 unsigned int x; 221 222 x = (insn & 0xf) | ((insn >> 2) & 0x30); 223 sprintf (buf, "0x%02x", x); 224 sprintf (comment, "%d", x); 225 } 226 break; 227 228 case 's': 229 sprintf (buf, "%d", insn & 7); 230 break; 231 232 case 'S': 233 sprintf (buf, "%d", (insn >> 4) & 7); 234 break; 235 236 case 'P': 237 { 238 unsigned int x; 239 240 x = (insn & 0xf); 241 x |= (insn >> 5) & 0x30; 242 sprintf (buf, "0x%02x", x); 243 sprintf (comment, "%d", x); 244 } 245 break; 246 247 case 'p': 248 { 249 unsigned int x; 250 251 x = (insn >> 3) & 0x1f; 252 sprintf (buf, "0x%02x", x); 253 sprintf (comment, "%d", x); 254 } 255 break; 256 257 case 'E': 258 sprintf (buf, "%d", (insn >> 4) & 15); 259 break; 260 261 case '?': 262 *buf = '\0'; 263 break; 264 265 default: 266 sprintf (buf, "??"); 267 fprintf (stderr, _("unknown constraint `%c'"), constraint); 268 ok = 0; 269 } 270 271 return ok; 272 } 273 274 static unsigned short 275 avrdis_opcode (bfd_vma addr, disassemble_info *info) 276 { 277 bfd_byte buffer[2]; 278 int status; 279 280 status = info->read_memory_func (addr, buffer, 2, info); 281 282 if (status == 0) 283 return bfd_getl16 (buffer); 284 285 info->memory_error_func (status, addr, info); 286 return -1; 287 } 288 289 290 int 291 print_insn_avr (bfd_vma addr, disassemble_info *info) 292 { 293 unsigned int insn, insn2; 294 const struct avr_opcodes_s *opcode; 295 static unsigned int *maskptr; 296 void *stream = info->stream; 297 fprintf_ftype prin = info->fprintf_func; 298 static unsigned int *avr_bin_masks; 299 static int initialized; 300 int cmd_len = 2; 301 int ok = 0; 302 char op1[20], op2[20], comment1[40], comment2[40]; 303 int sym_op1 = 0, sym_op2 = 0; 304 bfd_vma sym_addr1, sym_addr2; 305 306 307 if (!initialized) 308 { 309 unsigned int nopcodes; 310 311 /* PR 4045: Try to avoid duplicating the 0x prefix that 312 objdump_print_addr() will put on addresses when there 313 is no symbol table available. */ 314 if (info->symtab_size == 0) 315 comment_start = " "; 316 317 nopcodes = sizeof (avr_opcodes) / sizeof (struct avr_opcodes_s); 318 319 avr_bin_masks = xmalloc (nopcodes * sizeof (unsigned int)); 320 321 for (opcode = avr_opcodes, maskptr = avr_bin_masks; 322 opcode->name; 323 opcode++, maskptr++) 324 { 325 char * s; 326 unsigned int bin = 0; 327 unsigned int mask = 0; 328 329 for (s = opcode->opcode; *s; ++s) 330 { 331 bin <<= 1; 332 mask <<= 1; 333 bin |= (*s == '1'); 334 mask |= (*s == '1' || *s == '0'); 335 } 336 assert (s - opcode->opcode == 16); 337 assert (opcode->bin_opcode == bin); 338 *maskptr = mask; 339 } 340 341 initialized = 1; 342 } 343 344 insn = avrdis_opcode (addr, info); 345 346 for (opcode = avr_opcodes, maskptr = avr_bin_masks; 347 opcode->name; 348 opcode++, maskptr++) 349 { 350 if ((opcode->isa == AVR_ISA_TINY) && (info->mach != bfd_mach_avrtiny)) 351 continue; 352 if ((insn & *maskptr) == opcode->bin_opcode) 353 break; 354 } 355 356 /* Special case: disassemble `ldd r,b+0' as `ld r,b', and 357 `std b+0,r' as `st b,r' (next entry in the table). */ 358 359 if (AVR_DISP0_P (insn)) 360 opcode++; 361 362 op1[0] = 0; 363 op2[0] = 0; 364 comment1[0] = 0; 365 comment2[0] = 0; 366 367 if (opcode->name) 368 { 369 char *constraints = opcode->constraints; 370 char *opcode_str = opcode->opcode; 371 372 insn2 = 0; 373 ok = 1; 374 375 if (opcode->insn_size > 1) 376 { 377 insn2 = avrdis_opcode (addr + 2, info); 378 cmd_len = 4; 379 } 380 381 if (*constraints && *constraints != '?') 382 { 383 int regs = REGISTER_P (*constraints); 384 385 ok = avr_operand (insn, insn2, addr, *constraints, opcode_str, op1, comment1, 0, &sym_op1, &sym_addr1); 386 387 if (ok && *(++constraints) == ',') 388 ok = avr_operand (insn, insn2, addr, *(++constraints), opcode_str, op2, 389 *comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2); 390 } 391 } 392 393 if (!ok) 394 { 395 /* Unknown opcode, or invalid combination of operands. */ 396 sprintf (op1, "0x%04x", insn); 397 op2[0] = 0; 398 sprintf (comment1, "????"); 399 comment2[0] = 0; 400 } 401 402 (*prin) (stream, "%s", ok ? opcode->name : ".word"); 403 404 if (*op1) 405 (*prin) (stream, "\t%s", op1); 406 407 if (*op2) 408 (*prin) (stream, ", %s", op2); 409 410 if (*comment1) 411 (*prin) (stream, "\t; %s", comment1); 412 413 if (sym_op1) 414 info->print_address_func (sym_addr1, info); 415 416 if (*comment2) 417 (*prin) (stream, " %s", comment2); 418 419 if (sym_op2) 420 info->print_address_func (sym_addr2, info); 421 422 return cmd_len; 423 } 424
