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    Searched refs:AddDReg (Results 1 - 4 of 4) sorted by null

  /external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp 852 ARMBaseInstrInfo::AddDReg(MachineInstrBuilder &MIB, unsigned Reg,
899 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI);
900 AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI);
910 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI);
911 AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI);
    [all...]
Thumb2InstrInfo.cpp 157 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI);
158 AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI);
199 AddDReg(MIB, DestReg, ARM::gsub_0, RegState::DefineNoRead, TRI);
200 AddDReg(MIB, DestReg, ARM::gsub_1, RegState::DefineNoRead, TRI);
ARMBaseInstrInfo.h 201 const MachineInstrBuilder &AddDReg(MachineInstrBuilder &MIB, unsigned Reg,
  /external/swiftshader/third_party/LLVM/lib/Target/ARM/
ARMBaseInstrInfo.cpp 690 MachineInstrBuilder &AddDReg(MachineInstrBuilder &MIB,
770 MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI);
771 MIB = AddDReg(MIB, SrcReg, ARM::dsub_1, 0, TRI);
772 MIB = AddDReg(MIB, SrcReg, ARM::dsub_2, 0, TRI);
773 AddDReg(MIB, SrcReg, ARM::dsub_3, 0, TRI);
784 MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI);
785 MIB = AddDReg(MIB, SrcReg, ARM::dsub_1, 0, TRI);
786 MIB = AddDReg(MIB, SrcReg, ARM::dsub_2, 0, TRI);
787 MIB = AddDReg(MIB, SrcReg, ARM::dsub_3, 0, TRI);
788 MIB = AddDReg(MIB, SrcReg, ARM::dsub_4, 0, TRI)
    [all...]

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