| /toolchain/binutils/binutils-2.27/include/opcode/ |
| tic30.h | 227 #define AddressMode 0x00600000
247 { "absf" ,2,0x00000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
248 { "absi" ,2,0x00800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
249 { "addc" ,2,0x01000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
250 { "addc3" ,3,0x20000000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
251 { "addf" ,2,0x01800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
252 { "addf3" ,3,0x20800000,AddressMode, { TAddr1, TAddr2, Rn }, Imm_None },
253 { "addi" ,2,0x02000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
254 { "addi3" ,3,0x21000000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
255 { "and" ,2,0x02800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_UInt }
[all...] |
| /toolchain/binutils/binutils-2.27/opcodes/ |
| tic30-dis.c | 353 if (insn->tm->opcode_modifier == AddressMode)
372 switch (insn_word & AddressMode)
439 switch (insn_word & AddressMode)
|
| /external/stressapptest/src/ |
| os.h | 300 virtual int AddressMode();
|
| os.cc | 135 int OsLayer::AddressMode() {
|
| /device/linaro/bootloader/edk2/UefiCpuPkg/Include/Register/Msr/ |
| IvyBridgeMsr.h | 868 UINT32 AddressMode:3;
[all...] |
| /device/linaro/bootloader/edk2/ArmPkg/Library/ArmDisassemblerLib/ |
| ThumbDisassembler.c | 108 UINT32 AddressMode;
536 switch (gOpThumb[Index].AddressMode) {
706 switch (gOpThumb2[Index].AddressMode) {
[all...] |
| /toolchain/binutils/binutils-2.27/gas/config/ |
| tc-tic30.c | [all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceAssemblerARM32.h | 770 // aaaa<<21=AddressMode, l=IsLoad, nnnn=BaseReg, and
772 void emitMultiMemOp(CondARM32::Cond Cond, BlockAddressMode AddressMode,
[all...] |
| IceAssemblerARM32.cpp | [all...] |
