/art/compiler/utils/arm/ |
managed_register_arm.cc | 29 Register low = AsRegisterPairLow(); 81 os << "Pair: " << static_cast<int>(AsRegisterPairLow()) << ", "
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managed_register_arm.h | 139 Register reg_low = AsRegisterPairLow(); 147 constexpr Register AsRegisterPairLow() const { 154 return vixl::aarch32::Register(AsRegisterPairLow());
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managed_register_arm_test.cc | 235 EXPECT_EQ(R0, reg.AsRegisterPairLow()); 247 EXPECT_EQ(R1, reg.AsRegisterPairLow()); 259 EXPECT_EQ(R2, reg.AsRegisterPairLow()); 271 EXPECT_EQ(R4, reg.AsRegisterPairLow()); 283 EXPECT_EQ(R6, reg.AsRegisterPairLow()); [all...] |
jni_macro_assembler_arm_vixl.cc | 397 if (src.AsRegisterPairHigh() != dst.AsRegisterPairLow()) {
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/art/compiler/utils/mips/ |
managed_register_mips.cc | 30 Register low = AsRegisterPairLow(); 82 os << "Pair: " << AsRegisterPairLow() << ", " << AsRegisterPairHigh();
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managed_register_mips.h | 117 constexpr Register AsRegisterPairLow() const {
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assembler_mips.cc | [all...] |
/art/compiler/utils/x86/ |
managed_register_x86.cc | 68 Register low = AsRegisterPairLow(); 108 os << "Pair: " << AsRegisterPairLow() << ", " << AsRegisterPairHigh();
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managed_register_x86_test.cc | 124 EXPECT_EQ(EAX, reg.AsRegisterPairLow()); 133 EXPECT_EQ(EAX, reg.AsRegisterPairLow()); 142 EXPECT_EQ(EAX, reg.AsRegisterPairLow()); 151 EXPECT_EQ(EAX, reg.AsRegisterPairLow()); 160 EXPECT_EQ(EDX, reg.AsRegisterPairLow()); 169 EXPECT_EQ(EDX, reg.AsRegisterPairLow()); 178 EXPECT_EQ(EDX, reg.AsRegisterPairLow()); 187 EXPECT_EQ(ECX, reg.AsRegisterPairLow()); 196 EXPECT_EQ(ECX, reg.AsRegisterPairLow()); 205 EXPECT_EQ(EBX, reg.AsRegisterPairLow()); [all...] |
managed_register_x86.h | 114 constexpr Register AsRegisterPairLow() const {
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jni_macro_assembler_x86.cc | 133 __ movl(Address(ESP, offs), src.AsRegisterPairLow()); 196 __ movl(dest.AsRegisterPairLow(), Address(ESP, src)); 227 __ fs()->movl(dest.AsRegisterPairLow(), Address::Absolute(src));
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/art/compiler/utils/x86_64/ |
managed_register_x86_64.cc | 63 Register low = AsRegisterPairLow().AsRegister(); 103 os << "Pair: " << AsRegisterPairLow() << ", " << AsRegisterPairHigh();
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managed_register_x86_64_test.cc | 123 EXPECT_EQ(RAX, reg.AsRegisterPairLow()); 132 EXPECT_EQ(RAX, reg.AsRegisterPairLow()); 141 EXPECT_EQ(RAX, reg.AsRegisterPairLow()); 150 EXPECT_EQ(RAX, reg.AsRegisterPairLow()); 159 EXPECT_EQ(RDX, reg.AsRegisterPairLow()); 168 EXPECT_EQ(RDX, reg.AsRegisterPairLow()); 177 EXPECT_EQ(RDX, reg.AsRegisterPairLow()); 186 EXPECT_EQ(RCX, reg.AsRegisterPairLow()); 195 EXPECT_EQ(RCX, reg.AsRegisterPairLow()); 204 EXPECT_EQ(RBX, reg.AsRegisterPairLow()); [all...] |
managed_register_x86_64.h | 107 constexpr CpuRegister AsRegisterPairLow() const {
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jni_macro_assembler_x86_64.cc | 169 __ movq(Address(CpuRegister(RSP), offs), src.AsRegisterPairLow()); 240 __ movq(dest.AsRegisterPairLow(), Address(CpuRegister(RSP), src)); 272 __ gs()->movq(dest.AsRegisterPairLow(), Address::Absolute(src, true));
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/art/compiler/optimizing/ |
intrinsics_mips.cc | 166 Register out_lo = locations->Out().AsRegisterPairLow<Register>(); 207 Register in_lo = locations->InAt(0).AsRegisterPairLow<Register>(); 317 Register in_lo = locations->InAt(0).AsRegisterPairLow<Register>(); 319 Register out_lo = locations->Out().AsRegisterPairLow<Register>(); 448 Register in_lo = locations->InAt(0).AsRegisterPairLow<Register>(); 501 in_lo = locations->InAt(0).AsRegisterPairLow<Register>(); 665 Register in_lo = locations->InAt(0).AsRegisterPairLow<Register>(); 817 Register in_lo = locations->InAt(0).AsRegisterPairLow<Register>(); 819 Register out_lo = locations->Out().AsRegisterPairLow<Register>(); [all...] |
code_generator_x86.cc | [all...] |
intrinsics_x86.cc | 206 __ movd(output.AsRegisterPairLow<Register>(), temp); 221 __ movd(temp1, input.AsRegisterPairLow<Register>()); 314 Register input_lo = input.AsRegisterPairLow<Register>(); 317 Register output_lo = output.AsRegisterPairLow<Register>(); 450 Register input_lo = input.AsRegisterPairLow<Register>(); 453 Register output_lo = output.AsRegisterPairLow<Register>(); 675 Register output_lo = output.AsRegisterPairLow<Register>(); 678 Register op2_lo = op2_loc.AsRegisterPairLow<Register>(); [all...] |
code_generator_mips.cc | 698 Register offset = field_offset_.AsRegisterPairLow<Register>(); [all...] |
common_arm.h | 61 return vixl::aarch32::Register(location.AsRegisterPairLow<vixl::aarch32::Register>());
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locations.h | 193 T AsRegisterPairLow() const {
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code_generator_vector_x86.cc | 97 __ movd(dst, locations->InAt(0).AsRegisterPairLow<Register>()); 165 __ movd(locations->Out().AsRegisterPairLow<Register>(), src); [all...] |
code_generator_vector_mips.cc | 72 locations->InAt(0).AsRegisterPairLow<Register>(), 131 __ Copy_sW(locations->Out().AsRegisterPairLow<Register>(), src, 0); [all...] |
code_generator.cc | 741 DCHECK(is_out || !blocked_core_registers_[location.AsRegisterPairLow<int>()]); 742 blocked_core_registers_[location.AsRegisterPairLow<int>()] = true; [all...] |