| /external/vixl/test/aarch32/ |
| test-assembler-aarch32.cc | 990 TEST(bics) {
997 __ Bics(r0, r1, r1);
1009 __ Bics(r0, r0, Operand(r1, LSL, 4));
1021 __ Bics(r0, r0, Operand(r1, LSR, 4));
1033 __ Bics(r0, r0, Operand(r1, ASR, 4));
1045 __ Bics(r0, r0, Operand(r1, ROR, 1));
1059 __ Bics(r2, r0, Operand(r1, RRX));
1074 __ Bics(r2, r0, Operand(r1, RRX));
1085 __ Bics(r0, r0, 0xf000);
1096 __ Bics(r0, r0, 0x7fffffff)
[all...] |
| test-simulator-cond-rd-rn-operand-rm-a32.cc | 123 M(Bics) \
[all...] |
| test-simulator-cond-rd-rn-operand-rm-t32.cc | 123 M(Bics) \
[all...] |
| test-simulator-cond-rd-rn-operand-const-a32.cc | 123 M(Bics) \
[all...] |
| test-simulator-cond-rd-rn-operand-const-t32.cc | 123 M(Bics) \
[all...] |
| test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc | 123 M(Bics) \
[all...] |
| test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc | 123 M(Bics) \
[all...] |
| test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc | 123 M(Bics) \
[all...] |
| test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc | 123 M(Bics) \
[all...] |
| test-simulator-cond-rd-rn-operand-rm-shift-rs-a32.cc | 123 M(Bics) \
[all...] |
| /external/v8/src/arm64/ |
| macro-assembler-arm64-inl.h | 80 void MacroAssembler::Bics(const Register& rd,
85 LogicalMacro(rd, rn, operand, BICS);
[all...] |
| macro-assembler-arm64.h | 183 inline void Bics(const Register& rd,
[all...] |
| /external/vixl/src/aarch64/ |
| macro-assembler-aarch64.cc | 760 void MacroAssembler::Bics(const Register& rd,
764 LogicalMacro(rd, rn, operand, BICS);
844 case BICS:
863 case BICS:
[all...] |
| macro-assembler-aarch64.h | 651 void Bics(const Register& rd, const Register& rn, const Operand& operand);
[all...] |
| /external/vixl/src/aarch32/ |
| macro-assembler-aarch32.h | [all...] |
| /external/vixl/test/aarch64/ |
| test-assembler-aarch64.cc | 1062 TEST(bics) {
1067 __ Bics(w0, w1, Operand(w1));
[all...] |
