| /external/libchrome/dbus/ |
| mock_bus.cc | 11 MockBus::MockBus(const Bus::Options& options) : Bus(options) {
|
| mock_exported_object.cc | 9 MockExportedObject::MockExportedObject(Bus* bus,
11 : ExportedObject(bus, object_path) {
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| bus.cc | 5 #include "dbus/bus.h"
43 // The class is used for watching the file descriptor used for D-Bus
102 // The class is used for monitoring the timeout used for D-Bus method
108 // Bus::OnRemoveTimeout(). That's why we don't simply delete the object in
109 // Bus::OnRemoveTimeout().
126 void StartMonitoring(Bus* bus) {
127 bus->GetDBusTaskRunner()->PostDelayedTask(
163 // occur if this function is called after Bus::OnRemoveTimeout().
181 Bus::Options::Options(
[all...] |
| mock_object_manager.cc | 9 MockObjectManager::MockObjectManager(Bus* bus,
12 : ObjectManager(bus, service_name, object_path) {
|
| mock_object_proxy.cc | 9 MockObjectProxy::MockObjectProxy(Bus* bus,
12 : ObjectProxy(bus, service_name, object_path, DEFAULT_OPTIONS) {
|
| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/ |
| PchCommonDefinitions.h | 96 #define PchPciDeviceMmBase(Bus, Device, Function) \
98 (UINTN) PCH_PCI_EXPRESS_BASE_ADDRESS + (UINTN) (Bus << 20) + (UINTN) (Device << 15) + (UINTN) \
105 #define PchPciDeviceMmAddress(Segment, Bus, Device, Function, Register) \
107 (UINTN) PCH_PCI_EXPRESS_BASE_ADDRESS + (UINTN) (Bus << 20) + (UINTN) (Device << 15) + (UINTN) \
114 #define PchMmPci32Ptr(Segment, Bus, Device, Function, Register) \
115 ((volatile UINT32 *) PchPciDeviceMmAddress (Segment, Bus, Device, Function, Register))
117 #define PchMmPci32(Segment, Bus, Device, Function, Register) *PchMmPci32Ptr (Segment, Bus, Device, Function, Register)
119 #define PchMmPci32Or(Segment, Bus, Device, Function, Register, OrData) \
122 Bus, \
[all...] |
| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/ |
| VlvCommonDefinitions.h | 45 #define PCI_PBUS 0x0018 ///< Primary Bus Number Register
46 #define PCI_SBUS 0x0019 ///< Secondary Bus Number Register
47 #define PCI_SUBUS 0x001A ///< Subordinate Bus Number Register
118 #define MmPciAddress( Segment, Bus, Device, Function, Register ) \
120 (UINTN)(Bus << 20) + \
130 #define MmPci64Ptr( Segment, Bus, Device, Function, Register ) \
131 ( (volatile UINT64 *)MmPciAddress( Segment, Bus, Device, Function, Register ) )
133 #define MmPci64( Segment, Bus, Device, Function, Register ) \
134 *MmPci64Ptr( Segment, Bus, Device, Function, Register )
136 #define MmPci64Or( Segment, Bus, Device, Function, Register, OrData ) \
[all...] |
| /external/libbrillo/brillo/dbus/ |
| dbus_connection.h | 10 #include <dbus/bus.h>
16 // DBusConnection adds D-Bus support to Daemon.
22 // Instantiates dbus::Bus and establishes a D-Bus connection. Returns a
23 // reference to the connected bus, or an empty pointer in case of error.
24 scoped_refptr<dbus::Bus> Connect();
26 // Instantiates dbus::Bus and tries to establish a D-Bus connection for up to
29 scoped_refptr<dbus::Bus> ConnectWithTimeout(base::TimeDelta timeout);
32 scoped_refptr<dbus::Bus> bus_
[all...] |
| dbus_connection.cc | 26 scoped_refptr<dbus::Bus> DBusConnection::Connect() {
30 scoped_refptr<dbus::Bus> DBusConnection::ConnectWithTimeout(
37 dbus::Bus::Options options;
38 options.bus_type = dbus::Bus::SYSTEM;
40 scoped_refptr<dbus::Bus> bus = new dbus::Bus(options); local
43 if (bus->Connect()) {
44 bus_ = bus;
47 LOG(WARNING) << "Failed to get system bus."
[all...] |
| dbus_service_watcher.h | 15 #include <dbus/bus.h>
20 // DBusServiceWatcher just asks the bus to notify us when the owner of a remote
28 // registered callback in the Bus, because failure to remove callbacks will
29 // cause the Bus to crash the process on destruction.
32 DBusServiceWatcher(scoped_refptr<dbus::Bus> bus,
41 scoped_refptr<dbus::Bus> bus_;
43 dbus::Bus::GetServiceOwnerCallback monitoring_callback_;
|
| /system/update_engine/ |
| dbus_connection.h | 22 #include <dbus/bus.h>
30 const scoped_refptr<dbus::Bus>& GetDBus();
35 scoped_refptr<dbus::Bus> bus_;
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| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/UfsPciHcPei/ |
| UfsPciHcPei.c | 81 UINT16 Bus;
115 for (Bus = 0; Bus < 256; Bus++) {
118 SubClass = PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x0A));
119 BaseClass = PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x0B));
125 PciAnd16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (UINT16)~(EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE));
126 PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET), 0xFFFFFFFF);
127 Size = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET));
132 PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET), (UINT32)(PcdGet32 (PcdUfsPciHostControllerMmioBase (…)
[all...] |
| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Include/ |
| QNCCommonDefinitions.h | 38 #define PCI_PBUS 0x0018 // Primary Bus Number Register
39 #define PCI_SBUS 0x0019 // Secondary Bus Number Register
40 #define PCI_SUBUS 0x001A // Subordinate Bus Number Register
244 #define QNCMmPciAddress( Segment, Bus, Device, Function, Register ) \
246 (UINTN)(Bus << 20) + \
255 #define PciDeviceMmBase( Bus, Device, Function) \
257 (UINTN)(Bus << 20) + \
265 #define QNCMmPci32Ptr( Segment, Bus, Device, Function, Register ) \
266 ( (volatile UINT32 *)QNCMmPciAddress( Segment, Bus, Device, Function, Register ) )
268 #define QNCMmPci32( Segment, Bus, Device, Function, Register ) \
[all...] |
| /system/bt/service/ipc/dbus/ |
| ipc_handler_dbus.cc | 21 #include <dbus/bus.h>
25 using dbus::Bus;
38 dbus_thread_ = new base::Thread("D-Bus Thread");
52 Bus::Options bus_options;
53 bus_options.bus_type = Bus::SYSTEM;
54 bus_options.connection_type = Bus::PRIVATE;
57 scoped_refptr<Bus> bus_ = new Bus(bus_options);
|
| bluetooth_adapter.h | 22 #include <dbus/bus.h>
28 using ::dbus::Bus;
37 explicit BluetoothAdapter(scoped_refptr<Bus> bus,
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/ |
| SdMmcPciHcPei.c | 85 UINT16 Bus;
127 for (Bus = 0; Bus < 256; Bus++) {
130 SubClass = PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x0A));
131 BaseClass = PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x0B));
137 SlotInfo = PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, SD_MMC_HC_PEI_SLOT_OFFSET));
146 PciAnd16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (UINT16)~(EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE));
147 PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4 * Slot), 0xFFFFFFFF);
148 Size = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4 * Slot));
[all...] |
| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Include/ |
| IohCommonDefinitions.h | 38 #define PCI_PBUS 0x0018 // Primary Bus Number Register
39 #define PCI_SBUS 0x0019 // Secondary Bus Number Register
40 #define PCI_SUBUS 0x001A // Subordinate Bus Number Register
246 #define IohMmPciAddress( Segment, Bus, Device, Function, Register ) \
248 (UINTN)(Bus << 20) + \
257 #define IohMmPci32Ptr( Segment, Bus, Device, Function, Register ) \
258 ( (volatile UINT32 *)IohMmPciAddress( Segment, Bus, Device, Function, Register ) )
260 #define IohMmPci32( Segment, Bus, Device, Function, Register ) \
261 *IohMmPci32Ptr( Segment, Bus, Device, Function, Register )
263 #define IohMmPci32Or( Segment, Bus, Device, Function, Register, OrData ) \
[all...] |
| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/I2CLibPei/ |
| I2CAccess.h | 42 #define MmPciAddress( Segment, Bus, Device, Function, Register ) \
44 (UINTN)(Bus << 20) + \
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ |
| PciRomTable.h | 2 Set up ROM Table for PCI Bus module.
23 @param Bus Bus NO of PCI space.
34 IN UINT8 Bus,
|
| PciRomTable.c | 2 Set up ROM Table for PCI Bus module.
23 UINT8 Bus;
39 @param Bus Bus NO of PCI space.
50 IN UINT8 Bus,
80 mRomImageTable[mNumberOfPciRomImages].Bus = Bus;
111 mRomImageTable[Index].Bus == PciIoDevice->BusNumber &&
|
| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Include/Library/ |
| IohLib.h | 24 IN UINT8 Bus,
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/RuntimeDxe/EfiRuntimeLib/Ia32/ |
| PlatformIoLib.c | 31 UINT8 Bus,
42 Bus - PCI Bus
54 Data |= (((UINT32) Bus) << 16);
65 UINT8 Bus,
76 Bus - PCI Bus
90 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register);
111 UINT8 Bus,
122 Bus - PCI Bus
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/RuntimeDxe/EfiRuntimeLib/X64/ |
| PlatformIoLib.c | 31 UINT8 Bus,
42 Bus - PCI Bus
56 Data |= (((UINT32) Bus) << 16);
67 UINT8 Bus,
78 Bus - PCI Bus
92 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register);
113 UINT8 Bus,
124 Bus - PCI Bus
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Framework/Include/ |
| EfiPciCfg.h | 37 #define PEI_PCI_CFG_ADDRESS(bus, dev, func, reg) ( \
38 (UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)) \
52 #define EFI_PEI_PCI_CFG_ADDRESS(bus, dev, func, reg) \
53 (UINT64) ((((UINTN) (bus)) << 24) | \
64 UINT8 Bus;
76 UINT8 Bus;
|
| /device/linaro/bootloader/edk2/DuetPkg/Include/Guid/ |
| PciOptionRomTable.h | 28 UINT8 Bus;
|
