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Searched refs:DDRCOMP_CH_OFFSET (Results 1 - 2 of 2) sorted by null

/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/
meminit.c	619 isbM32m(DDRPHY, (DQVREFCH0 + (channel_i * DDRCOMP_CH_OFFSET)), ((0x08<<24)\|(0x03<<16)), ((BIT29\|BIT28\|BIT27\|BIT26\|BIT25\|BIT24)\|(BIT21\|BIT20\|BIT19\|BIT18\|BIT17\|BIT16))); // RCOMP Vref PU/PD 620 isbM32m(DDRPHY, (CMDVREFCH0 + (channel_i * DDRCOMP_CH_OFFSET)), ((0x0C<<24)\|(0x03<<16)), ((BIT29\|BIT28\|BIT27\|BIT26\|BIT25\|BIT24)\|(BIT21\|BIT20\|BIT19\|BIT18\|BIT17\|BIT16))); // RCOMP Vref PU/PD 621 isbM32m(DDRPHY, (CLKVREFCH0 + (channel_i * DDRCOMP_CH_OFFSET)), ((0x0F<<24)\|(0x03<<16)), ((BIT29\|BIT28\|BIT27\|BIT26\|BIT25\|BIT24)\|(BIT21\|BIT20\|BIT19\|BIT18\|BIT17\|BIT16))); // RCOMP Vref PU/PD 622 isbM32m(DDRPHY, (DQSVREFCH0 + (channel_i * DDRCOMP_CH_OFFSET)), ((0x08<<24)\|(0x03<<16)), ((BIT29\|BIT28\|BIT27\|BIT26\|BIT25\|BIT24)\|(BIT21\|BIT20\|BIT19\|BIT18\|BIT17\|BIT16))); // RCOMP Vref PU/PD 623 isbM32m(DDRPHY, (CTLVREFCH0 + (channel_i * DDRCOMP_CH_OFFSET)), ((0x0C<<24)\|(0x03<<16)), ((BIT29\|BIT28\|BIT27\|BIT26\|BIT25\|BIT24)\|(BIT21\|BIT20\|BIT19\|BIT18\|BIT17\|BIT16))); // RCOMP Vref PU/PD 626 isbM32m(DDRPHY, (COMPEN1CH0 + (channel_i * DDRCOMP_CH_OFFSET)), (BIT19\|BIT17), ((BIT31\|BIT30)\|BIT19\|BIT17\|(BIT15\|BIT14))); 629 isbM32m(DDRPHY, (DQVREFCH0 + (channel_i * DDRCOMP_CH_OFFSET)), ((0x32<<8)\|(0x03<<0)), ((BIT13\|BIT12\|BIT11\|BIT10\|BIT9\|BIT8)\|(BIT5\|BIT4\|BIT3\|BIT2\|BIT1\|BIT0))); // ODT Vref PU/PD 630 isbM32m(DDRPHY, (DQSVREFCH0 + (channel_i * DDRCOMP_CH_OFFSET)), ((0x32<<8)\|(0x03<<0)), ((BIT13\|BIT12\|BIT11\|BIT10\|BIT9\|BIT8)\|(BIT5\|BIT4\|BIT3\|BIT2\|BIT1\|BIT0))); // ODT Vref PU/PD 631 isbM32m(DDRPHY, (CLKVREFCH0 + (channel_i * DDRCOMP_CH_OFFSET)), ((0x0E<<8)\|(0x05<<0)), ((BIT13\|BIT12\|BIT11\|BIT10\|BIT9\|BIT8)\|(BIT5\|BIT4\|BIT3\|BIT2\|BIT1\|BIT0))); // ODT Vref PU/PD 637 isbM32m(DDRPHY, (DLYSELCH0 + (channel_i * DDRCOMP_CH_OFFSET)), (tempD), ((BIT19\|BIT18\|BIT17\|BIT16)\|(BIT15\|BIT14\|BIT13\|BIT12)\|(BIT11\|BIT10\|BIT9\|BIT8)\|(BIT7\|BIT (…) [all...]
gen5_iosf_sb_definitions.h	`471 #define DDRCOMP_CH_OFFSET 0x0100`

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