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    Searched refs:DDR_PCTL_BASE (Results 1 - 3 of 3) sorted by null

  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/
ddr_rk3368.c 249 p_ddr_reg->pctladdr = DDR_PCTL_BASE;
255 (uint32_t *)(DDR_PCTL_BASE + DDR_PCTL_TOGCNT1U), 35);
257 pctl_tim->SCFG = mmio_read_32(DDR_PCTL_BASE + DDR_PCTL_SCFG);
258 pctl_tim->CMDTSTATEN = mmio_read_32(DDR_PCTL_BASE +
260 pctl_tim->MCFG1 = mmio_read_32(DDR_PCTL_BASE + DDR_PCTL_MCFG1);
261 pctl_tim->MCFG = mmio_read_32(DDR_PCTL_BASE + DDR_PCTL_MCFG);
262 pctl_tim->PPCFG = mmio_read_32(DDR_PCTL_BASE + DDR_PCTL_PPCFG);
263 pctl_tim->pctl_timing.ddrfreq = mmio_read_32(DDR_PCTL_BASE +
265 pctl_tim->DFITCTRLDELAY = mmio_read_32(DDR_PCTL_BASE +
267 pctl_tim->DFIODTCFG = mmio_read_32(DDR_PCTL_BASE + DDR_PCTL_DFIODTCFG)
    [all...]
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/
rk3368_def.h 47 #define DDR_PCTL_BASE 0xff610000
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/drivers/soc/
soc.c 35 MAP_REGION_FLAT(DDR_PCTL_BASE, DDR_PCTL_SIZE,

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