/external/strace/ |
ioctl_iocdef.c | 34 * 'DEFINE' into '#define' 38 DEFINE HOST_IOC_NONE _IOC_NONE 39 DEFINE HOST_IOC_READ _IOC_READ 40 DEFINE HOST_IOC_WRITE _IOC_WRITE 42 DEFINE HOST_IOC_SIZESHIFT _IOC_SIZESHIFT 43 DEFINE HOST_IOC_DIRSHIFT _IOC_DIRSHIFT
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/device/linaro/bootloader/edk2/OvmfPkg/ |
DecomprScratchEnd.fdf.inc | 53 DEFINE OUTPUT_SIZE = (128 + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize + 16 + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize)
59 DEFINE DECOMP_SCRATCH_SIZE = 0x00010000
66 DEFINE OUTPUT_BASE = ($(MEMFD_BASE_ADDRESS) + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase + 0x00100000)
67 DEFINE DECOMP_SCRATCH_BASE_UNALIGNED = ($(OUTPUT_BASE) + $(OUTPUT_SIZE))
68 DEFINE DECOMP_SCRATCH_BASE_ALIGNMENT = 0x000FFFFF
69 DEFINE DECOMP_SCRATCH_BASE_MASK = 0xFFF00000
70 DEFINE DECOMP_SCRATCH_BASE = (($(DECOMP_SCRATCH_BASE_UNALIGNED) + $(DECOMP_SCRATCH_BASE_ALIGNMENT)) & $(DECOMP_SCRATCH_BASE_MASK))
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OvmfPkg.fdf.inc | 24 DEFINE BLOCK_SIZE = 0x1000
25 DEFINE VARS_SIZE = 0x20000
26 DEFINE VARS_BLOCKS = 0x20
30 DEFINE FW_BASE_ADDRESS = 0xFFF00000
31 DEFINE FW_SIZE = 0x00100000
32 DEFINE FW_BLOCKS = 0x100
33 DEFINE CODE_BASE_ADDRESS = 0xFFF20000
34 DEFINE CODE_SIZE = 0x000E0000
35 DEFINE CODE_BLOCKS = 0xE0
36 DEFINE FVMAIN_SIZE = 0x000CC000 [all...] |
/external/clang/test/Preprocessor/ |
macro_not_define.c | 1 // RUN: %clang_cc1 -E %s | grep '^ # define X 3$' 3 #define H # 4 #define D define 6 #define DEFINE(a, b) H D a b 8 DEFINE(X, 3)
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/external/tensorflow/tensorflow/core/kernels/ |
cast_op_gpu.cu.cc | 18 #define EIGEN_USE_GPU 36 #define DEFINE(O, I) template struct CastFunctor<GPUDevice, O, I> 37 #define DEFINE_ALL_FROM(in_type) \ 38 DEFINE(in_type, bool); \ 39 DEFINE(in_type, uint8); \ 40 DEFINE(in_type, int8); \ 41 DEFINE(in_type, uint16); \ 42 DEFINE(in_type, int16); \ 43 DEFINE(in_type, int32); [all...] |
scan_ops_gpu.cu.cc | 18 #define EIGEN_USE_GPU 30 #define DEFINE(REDUCER, T) template struct functor::Scan<GPUDevice, REDUCER, T>; 32 #define DEFINE_FOR_ALL_REDUCERS(T) \ 33 DEFINE(Eigen::internal::SumReducer<T>, T); \ 34 DEFINE(Eigen::internal::ProdReducer<T>, T); 38 #undef DEFINE
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reduction_ops_gpu_bool.cu.cc | 18 #define EIGEN_USE_GPU 36 #define DEFINE(T, REDUCER, IN_DIMS, NUM_AXES) \ 43 #define DEFINE_IDENTITY(T, REDUCER) \ 47 #define DEFINE_FOR_TYPE_AND_R(T, R) \ 48 DEFINE(T, R, 1, 1); \ 49 DEFINE(T, R, 2, 1); \ 50 DEFINE(T, R, 3, 1); \ 51 DEFINE(T, R, 3, 2); \ 57 #undef DEFINE [all...] |
reduction_ops_gpu_complex128.cu.cc | 18 #define EIGEN_USE_GPU 36 #define DEFINE(T, REDUCER, IN_DIMS, NUM_AXES) \ 43 #define DEFINE_IDENTITY(T, REDUCER) \ 47 #define DEFINE_FOR_TYPE_AND_R(T, R) \ 48 DEFINE(T, R, 1, 1); \ 49 DEFINE(T, R, 2, 1); \ 50 DEFINE(T, R, 3, 1); \ 51 DEFINE(T, R, 3, 2); \ 58 #undef DEFINE [all...] |
reduction_ops_gpu_complex64.cu.cc | 18 #define EIGEN_USE_GPU 36 #define DEFINE(T, REDUCER, IN_DIMS, NUM_AXES) \ 43 #define DEFINE_IDENTITY(T, REDUCER) \ 47 #define DEFINE_FOR_TYPE_AND_R(T, R) \ 48 DEFINE(T, R, 1, 1); \ 49 DEFINE(T, R, 2, 1); \ 50 DEFINE(T, R, 3, 1); \ 51 DEFINE(T, R, 3, 2); \ 58 #undef DEFINE [all...] |
reduction_ops_gpu_double.cu.cc | 18 #define EIGEN_USE_GPU 36 #define DEFINE(T, REDUCER, IN_DIMS, NUM_AXES) \ 43 #define DEFINE_IDENTITY(T, REDUCER) \ 47 #define DEFINE_FOR_TYPE_AND_R(T, R) \ 48 DEFINE(T, R, 1, 1); \ 49 DEFINE(T, R, 2, 1); \ 50 DEFINE(T, R, 3, 1); \ 51 DEFINE(T, R, 3, 2); \ 54 #define DEFINE_FOR_ALL_REDUCERS(T) [all...] |
reduction_ops_gpu_float.cu.cc | 18 #define EIGEN_USE_GPU 36 #define DEFINE(T, REDUCER, IN_DIMS, NUM_AXES) \ 43 #define DEFINE_IDENTITY(T, REDUCER) \ 47 #define DEFINE_FOR_TYPE_AND_R(T, R) \ 48 DEFINE(T, R, 1, 1); \ 49 DEFINE(T, R, 2, 1); \ 50 DEFINE(T, R, 3, 1); \ 51 DEFINE(T, R, 3, 2); \ 54 #define DEFINE_FOR_ALL_REDUCERS(T) [all...] |
reduction_ops_gpu_int.cu.cc | 18 #define EIGEN_USE_GPU 36 #define DEFINE(T, REDUCER, IN_DIMS, NUM_AXES) \ 43 #define DEFINE_IDENTITY(T, REDUCER) \ 47 #define DEFINE_FOR_TYPE_AND_R(T, R) \ 48 DEFINE(T, R, 1, 1); \ 49 DEFINE(T, R, 2, 1); \ 50 DEFINE(T, R, 3, 1); \ 51 DEFINE(T, R, 3, 2); \ 54 #define DEFINE_FOR_ALL_REDUCERS(T) [all...] |
reduction_ops_half_mean_sum.cu.cc | 18 #define EIGEN_USE_GPU 36 #define DEFINE(T, REDUCER, IN_DIMS, NUM_AXES) \ 43 #define DEFINE_IDENTITY(T, REDUCER) \ 47 #define DEFINE_FOR_TYPE_AND_R(T, R) \ 48 DEFINE(T, R, 1, 1); \ 49 DEFINE(T, R, 2, 1); \ 50 DEFINE(T, R, 3, 1); \ 51 DEFINE(T, R, 3, 2); \ 54 #define DEFINE_FOR_ALL_REDUCERS(T) [all...] |
reduction_ops_half_prod_max_min.cu.cc | 18 #define EIGEN_USE_GPU 36 #define DEFINE(T, REDUCER, IN_DIMS, NUM_AXES) \ 43 #define DEFINE_IDENTITY(T, REDUCER) \ 47 #define DEFINE_FOR_TYPE_AND_R(T, R) \ 48 DEFINE(T, R, 1, 1); \ 49 DEFINE(T, R, 2, 1); \ 50 DEFINE(T, R, 3, 1); \ 51 DEFINE(T, R, 3, 2); \ 54 #define DEFINE_FOR_ALL_REDUCERS(T) [all...] |
sparse_tensor_dense_matmul_op_gpu.cu.cc | 18 #define EIGEN_USE_GPU 95 #define DEFINE(T, Tindices) \ 105 DEFINE(float, int32); 106 DEFINE(float, int64); 107 #undef DEFINE
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/device/linaro/bootloader/edk2/EdkShellPkg/ |
EdkShellPkg.dsc | 31 # DEFINE EDK_SHELL_DIR = EdkShellPkg/Shell # when "Shell" directory is under $(WORKSPACE)/EdkShellPkg
33 DEFINE EDK_SHELL_DIR = Shell # when "Shell" directory is directly under $(WORKSPACE)
35 DEFINE MSFT_MACRO = /D EFI_SPECIFICATION_VERSION=0x0002000A /D PI_SPECIFICATION_VERSION=0x00009000 /D TIANO_RELEASE_VERSION=0x00080006 /D PCD_EDKII_GLUE_PciExpressBaseAddress=0xE0000000 /D EFI_DEBUG
36 DEFINE INTEL_MACRO = /D EFI_SPECIFICATION_VERSION=0x0002000A /D PI_SPECIFICATION_VERSION=0x00009000 /D TIANO_RELEASE_VERSION=0x00080006 /D PCD_EDKII_GLUE_PciExpressBaseAddress=0xE0000000 /D EFI_DEBUG
37 DEFINE GCC_MACRO = -DEFI_SPECIFICATION_VERSION=0x0002000A -DPI_SPECIFICATION_VERSION=0x00009000 -DTIANO_RELEASE_VERSION=0x00080006 -DPCD_EDKII_GLUE_PciExpressBaseAddress=0xE0000000 -DEFI_DEBUG -DSTRING_ARRAY_NAME=$(BASE_NAME)Strings -DSTRING_DEFINES_FILE=\"$(BASE_NAME)StrDefs.h\"
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/external/mesa3d/src/mesa/x86/ |
gen_matypes.c | 36 #define __STDC_FORMAT_MACROS 48 #define offsetof( type, member ) ((size_t) &((type *)0)->member) 51 #define OFFSET_HEADER( x ) \ 62 #define DEFINE_HEADER( x ) \ 78 #define DEFINE_UL( s, ul ) \ 81 #define DEFINE( s, d ) \ 84 #define printf( x ) \ 89 #define DEFINE_UL( s, ul ) \ 90 printf( "#define %s\t%lu\n", s, (unsigned long) (ul) ) [all...] |
/external/protobuf/objectivec/DevTools/ |
pddm_tests.py | 49 f = io.StringIO(u"""PDDM-DEFINE foo( ) 62 PDDM-DEFINE noArgs( ) 66 PDDM-DEFINE-END 68 PDDM-DEFINE oneArg(foo) 70 PDDM-DEFINE twoArgs( bar_ , baz ) 92 PDDM-DEFINE another(a,b,c) 106 (u'PDDM-DEFINE foo()\nbody\nPDDM-DEFINED foo\nbaz', 109 (u'PDDM-DEFINE foo()\nbody\nPDDM-DEFINE-END\nPDDM-DEFINE-END\n' [all...] |
/external/curl/packages/OS400/ |
make-tests.sh | 61 -D?*) DEFINE="`echo \"${FLAG}\" | sed 's/^..//'`" 62 PGMDEFINES="${PGMDEFINES} '${DEFINE}'"
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/device/linaro/bootloader/edk2/QuarkPlatformPkg/ |
QuarkMin.fdf | 65 # Define value used to compute FLASH regions below reset vector location just below 4GB
67 DEFINE RESET_ADDRESS = 0x100000000 # 4 GB
72 DEFINE FLASH_SIZE = 0x800000
73 DEFINE FLASH_BASE = $(RESET_ADDRESS) - $(FLASH_SIZE) # The base address of the Flash Device
78 DEFINE FLASH_BLOCKSIZE = 0x1000 # 4 KB
83 DEFINE FLASH_BLOCKSIZE_DATA = 0x00, 0x10, 0x00, 0x00 # equivalent for DATA blocks
88 DEFINE FLASH_FV_PAYLOAD_BASE = 0x00400000
89 DEFINE FLASH_FV_PAYLOAD_SIZE = 0x00100000
94 DEFINE FLASH_FV_MAIN_BASE = 0x00500000
95 DEFINE FLASH_FV_MAIN_SIZE = 0x001E0000 [all...] |
/external/mesa3d/src/compiler/glsl/glcpp/ |
glcpp-lex.l | 38 #define YY_NO_UNISTD_H 41 #define YY_NO_INPUT 43 #define YY_USER_ACTION \ 57 #define YY_USER_INIT \ 88 #define RETURN_TOKEN_NEVER_SKIP(token) \ 94 #define RETURN_TOKEN(token) \ 101 #define RETURN_STRING_TOKEN(token) \ 174 %x COMMENT DEFINE DONE HASH NEWLINE_CATCHUP UNREACHABLE 259 <INITIAL,DEFINE,HASH>"//"[^\r\n]* { 263 <INITIAL,DEFINE,HASH>"/*" { yy_push_state(COMMENT, yyscanner); [all...] |
/device/linaro/bootloader/edk2/CorebootPayloadPkg/ |
CorebootPayloadPkgIa32.dsc | 33 DEFINE SECURE_BOOT_ENABLE = FALSE
34 DEFINE SOURCE_DEBUG_ENABLE = FALSE
39 DEFINE MAX_LOGICAL_PROCESSORS = 64
44 DEFINE PCIE_BASE = 0xE0000000
49 DEFINE BAUD_RATE = 115200
50 DEFINE SERIAL_CLOCK_RATE = 1843200
51 DEFINE SERIAL_LINE_CONTROL = 3 # 8-bits, no parity
52 DEFINE SERIAL_HARDWARE_FLOW_CONTROL = FALSE
53 DEFINE SERIAL_DETECT_CABLE = FALSE
54 DEFINE SERIAL_FIFO_CONTROL = 7 # Enable FIFO [all...] |
CorebootPayloadPkgIa32X64.dsc | 33 DEFINE SECURE_BOOT_ENABLE = FALSE
34 DEFINE SOURCE_DEBUG_ENABLE = FALSE
39 DEFINE MAX_LOGICAL_PROCESSORS = 64
44 DEFINE PCIE_BASE = 0xE0000000
49 DEFINE BAUD_RATE = 115200
50 DEFINE SERIAL_CLOCK_RATE = 1843200
51 DEFINE SERIAL_LINE_CONTROL = 3 # 8-bits, no parity
52 DEFINE SERIAL_HARDWARE_FLOW_CONTROL = FALSE
53 DEFINE SERIAL_DETECT_CABLE = FALSE
54 DEFINE SERIAL_FIFO_CONTROL = 7 # Enable FIFO [all...] |
/device/linaro/bootloader/edk2/AppPkg/ |
AppPkg.dsc | 33 DEFINE DEBUG_ENABLE_OUTPUT = FALSE # Set to TRUE to enable debug output
34 DEFINE DEBUG_PRINT_ERROR_LEVEL = 0x80000040 # Flags to control amount of debug output
35 DEFINE DEBUG_PROPERTY_MASK = 0
142 # Define EMULATE if we are, else keep the DEFINE commented out.
144 # DEFINE EMULATE = 1
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/rx/ |
rx-asm-bad.s | 35 fred .DEFINE "#01H,mem"
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