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Searched
refs:DRM_IO
(Results
1 - 25
of
31
) sorted by null
1
2
/external/ltp/testcases/kernel/device-drivers/drm/kernel_space/
tdrm.h
61
#define TDRM_STUB_REGISTER
DRM_IO
( 0x41 )
62
#define TDRM_STUB_UNREGISTER
DRM_IO
( 0x42 )
63
#define TDRM_UNINIT_AGP
DRM_IO
( 0x43 )
64
#define TDRM_INIT_AGP
DRM_IO
( 0x44 )
65
#define TDRM_ADD_MAGIC
DRM_IO
( 0x45 )
66
#define TDRM_REMOVE_MAGIC
DRM_IO
( 0x46 )
67
#define TDRM_CTXBITMAP_INIT
DRM_IO
( 0x47 )
68
#define TDRM_CTXBITMAP_UNINIT
DRM_IO
( 0x48 )
69
#define TDRM_ALLOC_PAGES
DRM_IO
( 0x49 )
70
#define TDRM_FREE_PAGES
DRM_IO
( 0x50
[
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/bionic/libc/kernel/uapi/drm/
i810_drm.h
163
#define DRM_IOCTL_I810_FLUSH
DRM_IO
(DRM_COMMAND_BASE + DRM_I810_FLUSH)
164
#define DRM_IOCTL_I810_GETAGE
DRM_IO
(DRM_COMMAND_BASE + DRM_I810_GETAGE)
166
#define DRM_IOCTL_I810_SWAP
DRM_IO
(DRM_COMMAND_BASE + DRM_I810_SWAP)
168
#define DRM_IOCTL_I810_DOCOPY
DRM_IO
(DRM_COMMAND_BASE + DRM_I810_DOCOPY)
170
#define DRM_IOCTL_I810_FSTATUS
DRM_IO
(DRM_COMMAND_BASE + DRM_I810_FSTATUS)
171
#define DRM_IOCTL_I810_OV0FLIP
DRM_IO
(DRM_COMMAND_BASE + DRM_I810_OV0FLIP)
173
#define DRM_IOCTL_I810_RSTATUS
DRM_IO
(DRM_COMMAND_BASE + DRM_I810_RSTATUS)
174
#define DRM_IOCTL_I810_FLIP
DRM_IO
(DRM_COMMAND_BASE + DRM_I810_FLIP)
r128_drm.h
125
#define DRM_IOCTL_R128_CCE_START
DRM_IO
(DRM_COMMAND_BASE + DRM_R128_CCE_START)
127
#define DRM_IOCTL_R128_CCE_RESET
DRM_IO
(DRM_COMMAND_BASE + DRM_R128_CCE_RESET)
128
#define DRM_IOCTL_R128_CCE_IDLE
DRM_IO
(DRM_COMMAND_BASE + DRM_R128_CCE_IDLE)
129
#define DRM_IOCTL_R128_RESET
DRM_IO
(DRM_COMMAND_BASE + DRM_R128_RESET)
130
#define DRM_IOCTL_R128_SWAP
DRM_IO
(DRM_COMMAND_BASE + DRM_R128_SWAP)
141
#define DRM_IOCTL_R128_FLIP
DRM_IO
(DRM_COMMAND_BASE + DRM_R128_FLIP)
radeon_drm.h
389
#define DRM_IOCTL_RADEON_CP_START
DRM_IO
(DRM_COMMAND_BASE + DRM_RADEON_CP_START)
391
#define DRM_IOCTL_RADEON_CP_RESET
DRM_IO
(DRM_COMMAND_BASE + DRM_RADEON_CP_RESET)
392
#define DRM_IOCTL_RADEON_CP_IDLE
DRM_IO
(DRM_COMMAND_BASE + DRM_RADEON_CP_IDLE)
393
#define DRM_IOCTL_RADEON_RESET
DRM_IO
(DRM_COMMAND_BASE + DRM_RADEON_RESET)
395
#define DRM_IOCTL_RADEON_SWAP
DRM_IO
(DRM_COMMAND_BASE + DRM_RADEON_SWAP)
405
#define DRM_IOCTL_RADEON_FLIP
DRM_IO
(DRM_COMMAND_BASE + DRM_RADEON_FLIP)
411
#define DRM_IOCTL_RADEON_CP_RESUME
DRM_IO
(DRM_COMMAND_BASE + DRM_RADEON_CP_RESUME)
mga_drm.h
155
#define DRM_IOCTL_MGA_RESET
DRM_IO
(DRM_COMMAND_BASE + DRM_MGA_RESET)
156
#define DRM_IOCTL_MGA_SWAP
DRM_IO
(DRM_COMMAND_BASE + DRM_MGA_SWAP)
drm.h
435
#define
DRM_IO
(nr) _IO(DRM_IOCTL_BASE, nr)
467
#define DRM_IOCTL_SET_MASTER
DRM_IO
(0x1e)
468
#define DRM_IOCTL_DROP_MASTER
DRM_IO
(0x1f)
484
#define DRM_IOCTL_AGP_ACQUIRE
DRM_IO
(0x30)
485
#define DRM_IOCTL_AGP_RELEASE
DRM_IO
(0x31)
i915_drm.h
178
#define DRM_IOCTL_I915_FLUSH
DRM_IO
(DRM_COMMAND_BASE + DRM_I915_FLUSH)
179
#define DRM_IOCTL_I915_FLIP
DRM_IO
(DRM_COMMAND_BASE + DRM_I915_FLIP)
203
#define DRM_IOCTL_I915_GEM_THROTTLE
DRM_IO
(DRM_COMMAND_BASE + DRM_I915_GEM_THROTTLE)
204
#define DRM_IOCTL_I915_GEM_ENTERVT
DRM_IO
(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT)
205
#define DRM_IOCTL_I915_GEM_LEAVEVT
DRM_IO
(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT)
/external/kernel-headers/original/uapi/drm/
i810_drm.h
222
#define DRM_IOCTL_I810_FLUSH
DRM_IO
( DRM_COMMAND_BASE + DRM_I810_FLUSH)
223
#define DRM_IOCTL_I810_GETAGE
DRM_IO
( DRM_COMMAND_BASE + DRM_I810_GETAGE)
225
#define DRM_IOCTL_I810_SWAP
DRM_IO
( DRM_COMMAND_BASE + DRM_I810_SWAP)
227
#define DRM_IOCTL_I810_DOCOPY
DRM_IO
( DRM_COMMAND_BASE + DRM_I810_DOCOPY)
229
#define DRM_IOCTL_I810_FSTATUS
DRM_IO
( DRM_COMMAND_BASE + DRM_I810_FSTATUS)
230
#define DRM_IOCTL_I810_OV0FLIP
DRM_IO
( DRM_COMMAND_BASE + DRM_I810_OV0FLIP)
232
#define DRM_IOCTL_I810_RSTATUS
DRM_IO
( DRM_COMMAND_BASE + DRM_I810_RSTATUS)
233
#define DRM_IOCTL_I810_FLIP
DRM_IO
( DRM_COMMAND_BASE + DRM_I810_FLIP)
r128_drm.h
206
#define DRM_IOCTL_R128_CCE_START
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_CCE_START)
208
#define DRM_IOCTL_R128_CCE_RESET
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_CCE_RESET)
209
#define DRM_IOCTL_R128_CCE_IDLE
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_CCE_IDLE)
211
#define DRM_IOCTL_R128_RESET
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_RESET)
212
#define DRM_IOCTL_R128_SWAP
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_SWAP)
224
#define DRM_IOCTL_R128_FLIP
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_FLIP)
radeon_drm.h
521
#define DRM_IOCTL_RADEON_CP_START
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_CP_START)
523
#define DRM_IOCTL_RADEON_CP_RESET
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_CP_RESET)
524
#define DRM_IOCTL_RADEON_CP_IDLE
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_CP_IDLE)
525
#define DRM_IOCTL_RADEON_RESET
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_RESET)
527
#define DRM_IOCTL_RADEON_SWAP
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_SWAP)
537
#define DRM_IOCTL_RADEON_FLIP
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_FLIP)
543
#define DRM_IOCTL_RADEON_CP_RESUME
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_CP_RESUME)
[
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...]
mga_drm.h
256
#define DRM_IOCTL_MGA_RESET
DRM_IO
( DRM_COMMAND_BASE + DRM_MGA_RESET)
257
#define DRM_IOCTL_MGA_SWAP
DRM_IO
( DRM_COMMAND_BASE + DRM_MGA_SWAP)
drm.h
773
#define
DRM_IO
(nr) _IO(DRM_IOCTL_BASE,nr)
810
#define DRM_IOCTL_SET_MASTER
DRM_IO
(0x1e)
811
#define DRM_IOCTL_DROP_MASTER
DRM_IO
(0x1f)
830
#define DRM_IOCTL_AGP_ACQUIRE
DRM_IO
( 0x30)
831
#define DRM_IOCTL_AGP_RELEASE
DRM_IO
( 0x31)
i915_drm.h
267
#define DRM_IOCTL_I915_FLUSH
DRM_IO
( DRM_COMMAND_BASE + DRM_I915_FLUSH)
268
#define DRM_IOCTL_I915_FLIP
DRM_IO
( DRM_COMMAND_BASE + DRM_I915_FLIP)
292
#define DRM_IOCTL_I915_GEM_THROTTLE
DRM_IO
( DRM_COMMAND_BASE + DRM_I915_GEM_THROTTLE)
293
#define DRM_IOCTL_I915_GEM_ENTERVT
DRM_IO
(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT)
294
#define DRM_IOCTL_I915_GEM_LEAVEVT
DRM_IO
(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT)
[
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...]
/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/drm/
i810_drm.h
215
#define DRM_IOCTL_I810_FLUSH
DRM_IO
( DRM_COMMAND_BASE + DRM_I810_FLUSH)
216
#define DRM_IOCTL_I810_GETAGE
DRM_IO
( DRM_COMMAND_BASE + DRM_I810_GETAGE)
218
#define DRM_IOCTL_I810_SWAP
DRM_IO
( DRM_COMMAND_BASE + DRM_I810_SWAP)
220
#define DRM_IOCTL_I810_DOCOPY
DRM_IO
( DRM_COMMAND_BASE + DRM_I810_DOCOPY)
222
#define DRM_IOCTL_I810_FSTATUS
DRM_IO
( DRM_COMMAND_BASE + DRM_I810_FSTATUS)
223
#define DRM_IOCTL_I810_OV0FLIP
DRM_IO
( DRM_COMMAND_BASE + DRM_I810_OV0FLIP)
225
#define DRM_IOCTL_I810_RSTATUS
DRM_IO
( DRM_COMMAND_BASE + DRM_I810_RSTATUS)
226
#define DRM_IOCTL_I810_FLIP
DRM_IO
( DRM_COMMAND_BASE + DRM_I810_FLIP)
r128_drm.h
200
#define DRM_IOCTL_R128_CCE_START
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_CCE_START)
202
#define DRM_IOCTL_R128_CCE_RESET
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_CCE_RESET)
203
#define DRM_IOCTL_R128_CCE_IDLE
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_CCE_IDLE)
205
#define DRM_IOCTL_R128_RESET
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_RESET)
206
#define DRM_IOCTL_R128_SWAP
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_SWAP)
218
#define DRM_IOCTL_R128_FLIP
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_FLIP)
drm.h
623
#define
DRM_IO
(nr) _IO(DRM_IOCTL_BASE,nr)
659
#define DRM_IOCTL_SET_MASTER
DRM_IO
(0x1e)
660
#define DRM_IOCTL_DROP_MASTER
DRM_IO
(0x1f)
678
#define DRM_IOCTL_AGP_ACQUIRE
DRM_IO
( 0x30)
679
#define DRM_IOCTL_AGP_RELEASE
DRM_IO
( 0x31)
i915_drm.h
195
#define DRM_IOCTL_I915_FLUSH
DRM_IO
( DRM_COMMAND_BASE + DRM_I915_FLUSH)
196
#define DRM_IOCTL_I915_FLIP
DRM_IO
( DRM_COMMAND_BASE + DRM_I915_FLIP)
217
#define DRM_IOCTL_I915_GEM_THROTTLE
DRM_IO
( DRM_COMMAND_BASE + DRM_I915_GEM_THROTTLE)
218
#define DRM_IOCTL_I915_GEM_ENTERVT
DRM_IO
(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT)
219
#define DRM_IOCTL_I915_GEM_LEAVEVT
DRM_IO
(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT)
radeon_drm.h
514
#define DRM_IOCTL_RADEON_CP_START
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_CP_START)
516
#define DRM_IOCTL_RADEON_CP_RESET
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_CP_RESET)
517
#define DRM_IOCTL_RADEON_CP_IDLE
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_CP_IDLE)
518
#define DRM_IOCTL_RADEON_RESET
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_RESET)
520
#define DRM_IOCTL_RADEON_SWAP
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_SWAP)
530
#define DRM_IOCTL_RADEON_FLIP
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_FLIP)
536
#define DRM_IOCTL_RADEON_CP_RESUME
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_CP_RESUME)
[
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...]
mga_drm.h
252
#define DRM_IOCTL_MGA_RESET
DRM_IO
( DRM_COMMAND_BASE + DRM_MGA_RESET)
253
#define DRM_IOCTL_MGA_SWAP
DRM_IO
( DRM_COMMAND_BASE + DRM_MGA_SWAP)
/external/libdrm/include/drm/
mach64_drm.h
167
#define DRM_IOCTL_MACH64_IDLE
DRM_IO
( DRM_COMMAND_BASE + DRM_MACH64_IDLE )
168
#define DRM_IOCTL_MACH64_RESET
DRM_IO
( DRM_COMMAND_BASE + DRM_MACH64_RESET )
169
#define DRM_IOCTL_MACH64_SWAP
DRM_IO
( DRM_COMMAND_BASE + DRM_MACH64_SWAP )
173
#define DRM_IOCTL_MACH64_FLUSH
DRM_IO
( DRM_COMMAND_BASE + DRM_MACH64_FLUSH )
r128_drm.h
200
#define DRM_IOCTL_R128_CCE_START
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_CCE_START)
202
#define DRM_IOCTL_R128_CCE_RESET
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_CCE_RESET)
203
#define DRM_IOCTL_R128_CCE_IDLE
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_CCE_IDLE)
205
#define DRM_IOCTL_R128_RESET
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_RESET)
206
#define DRM_IOCTL_R128_SWAP
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_SWAP)
218
#define DRM_IOCTL_R128_FLIP
DRM_IO
( DRM_COMMAND_BASE + DRM_R128_FLIP)
drm.h
704
#define
DRM_IO
(nr) _IO(DRM_IOCTL_BASE,nr)
741
#define DRM_IOCTL_SET_MASTER
DRM_IO
(0x1e)
742
#define DRM_IOCTL_DROP_MASTER
DRM_IO
(0x1f)
761
#define DRM_IOCTL_AGP_ACQUIRE
DRM_IO
( 0x30)
762
#define DRM_IOCTL_AGP_RELEASE
DRM_IO
( 0x31)
radeon_drm.h
521
#define DRM_IOCTL_RADEON_CP_START
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_CP_START)
523
#define DRM_IOCTL_RADEON_CP_RESET
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_CP_RESET)
524
#define DRM_IOCTL_RADEON_CP_IDLE
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_CP_IDLE)
525
#define DRM_IOCTL_RADEON_RESET
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_RESET)
527
#define DRM_IOCTL_RADEON_SWAP
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_SWAP)
537
#define DRM_IOCTL_RADEON_FLIP
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_FLIP)
543
#define DRM_IOCTL_RADEON_CP_RESUME
DRM_IO
( DRM_COMMAND_BASE + DRM_RADEON_CP_RESUME)
[
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...]
mga_drm.h
252
#define DRM_IOCTL_MGA_RESET
DRM_IO
( DRM_COMMAND_BASE + DRM_MGA_RESET)
253
#define DRM_IOCTL_MGA_SWAP
DRM_IO
( DRM_COMMAND_BASE + DRM_MGA_SWAP)
i915_drm.h
265
#define DRM_IOCTL_I915_FLUSH
DRM_IO
( DRM_COMMAND_BASE + DRM_I915_FLUSH)
266
#define DRM_IOCTL_I915_FLIP
DRM_IO
( DRM_COMMAND_BASE + DRM_I915_FLIP)
290
#define DRM_IOCTL_I915_GEM_THROTTLE
DRM_IO
( DRM_COMMAND_BASE + DRM_I915_GEM_THROTTLE)
291
#define DRM_IOCTL_I915_GEM_ENTERVT
DRM_IO
(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT)
292
#define DRM_IOCTL_I915_GEM_LEAVEVT
DRM_IO
(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT)
[
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Completed in 994 milliseconds
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