| /external/valgrind/none/tests/mips64/ |
| shift_instructions.c | 6 DROTR=0, DROTR32, DROTRV, DSLL,
34 case DROTR32:
37 TEST2("drotr32 $t0, $t1, 0x00", reg_val1[i], 0x00, t0, t1);
38 TEST2("drotr32 $t2, $t3, 0x1f", reg_val1[i], 0x1f, t2, t3);
39 TEST2("drotr32 $a0, $a1, 0x0f", reg_val1[i], 0x0f, a0, a1);
40 TEST2("drotr32 $s0, $s1, 0x03", reg_val1[i], 0x03, s0, s1);
41 TEST2("drotr32 $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1);
42 TEST2("drotr32 $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3);
43 TEST2("drotr32 $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1);
44 TEST2("drotr32 $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1)
[all...] |
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCCodeEmitter.cpp | 79 Inst.setOpcode(Mips::DROTR32);
[all...] |
| /external/llvm/lib/Target/Mips/AsmParser/ |
| MipsAsmParser.cpp | [all...] |
