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    Searched refs:IsShiftedRegister (Results 1 - 18 of 18) sorted by null

  /external/vixl/src/aarch64/
operands-aarch64.cc 346 bool Operand::IsShiftedRegister() const {
366 VIXL_ASSERT(IsShiftedRegister());
442 } else if (offset.IsShiftedRegister()) {
operands-aarch64.h 758 bool IsShiftedRegister() const;
779 VIXL_ASSERT(IsShiftedRegister() || IsExtendedRegister());
786 VIXL_ASSERT(IsShiftedRegister());
798 VIXL_ASSERT(IsShiftedRegister() || IsExtendedRegister());
macro-assembler-aarch64.cc 910 VIXL_ASSERT(operand.IsShiftedRegister());
926 } else if (operand.IsShiftedRegister() && (operand.GetShiftAmount() != 0)) {
    [all...]
assembler-aarch64.cc     [all...]
  /external/v8/src/arm64/
assembler-arm64-inl.h 361 bool Operand::IsShiftedRegister() const {
381 DCHECK(IsShiftedRegister());
400 DCHECK(IsShiftedRegister() || IsExtendedRegister());
406 DCHECK(IsShiftedRegister());
418 DCHECK(IsShiftedRegister() || IsExtendedRegister());
493 } else if (offset.IsShiftedRegister()) {
    [all...]
macro-assembler-arm64.cc 155 DCHECK(operand.IsShiftedRegister());
258 } else if (operand.IsShiftedRegister() && (operand.shift_amount() != 0)) {
360 } else if ((operand.IsShiftedRegister() && (operand.shift_amount() == 0)) ||
402 } else if (operand.IsShiftedRegister() && (operand.shift_amount() == 0)) {
493 (rn.IsZero() && !operand.IsShiftedRegister()) ||
494 (operand.IsShiftedRegister() && (operand.shift() == ROR))) {
525 (operand.IsShiftedRegister() && (operand.shift() == ROR))) {
531 } else if (operand.IsShiftedRegister() && (operand.shift_amount() != 0)) {
    [all...]
assembler-arm64.cc     [all...]
assembler-arm64.h 605 inline bool IsShiftedRegister() const;
    [all...]
  /external/vixl/src/aarch32/
operands-aarch32.cc 535 } else if (operand.IsShiftedRegister()) {
operands-aarch32.h 837 bool IsShiftedRegister() const { return rm_.IsValid(); }
assembler-aarch32.cc     [all...]
disasm-aarch32.h 480 } else if (operand.IsShiftedRegister()) {
    [all...]
macro-assembler-aarch32.h 546 (operand.IsShiftedRegister() &&
    [all...]
  /external/vixl/test/aarch32/
test-simulator-cond-rd-memop-immediate-512-a32.cc     [all...]
test-simulator-cond-rd-memop-immediate-8192-a32.cc     [all...]
test-simulator-cond-rd-memop-rs-a32.cc     [all...]
test-simulator-cond-rd-memop-rs-shift-amount-1to31-a32.cc     [all...]
test-simulator-cond-rd-memop-rs-shift-amount-1to32-a32.cc     [all...]

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