| /art/compiler/utils/mips/ |
| assembler_mips_test.cc | [all...] |
| assembler_mips.h | 410 // Jalr() and Jr() fill their delay slots when reordering is enabled.
413 void Jalr(Register rd, Register rs);
414 void Jalr(Register rs);
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| assembler_mips.cc | 939 void MipsAssembler::Jalr(Register rd, Register rs) {
[all...] |
| assembler_mips32r6_test.cc | [all...] |
| /art/compiler/utils/mips64/ |
| assembler_mips64.cc | 712 void Mips64Assembler::Jalr(GpuRegister rd, GpuRegister rs) {
716 void Mips64Assembler::Jalr(GpuRegister rs) {
717 Jalr(RA, rs);
721 Jalr(ZERO, rs);
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| assembler_mips64.h | 548 void Jalr(GpuRegister rd, GpuRegister rs);
549 void Jalr(GpuRegister rs);
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| assembler_mips64_test.cc | 775 TEST_F(AssemblerMIPS64Test, Jalr) {
777 RepeatRRNoDupes(&mips64::Mips64Assembler::Jalr, "jalr ${reg1}, ${reg2}"), "jalr");
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| /art/compiler/optimizing/ |
| code_generator_mips.cc | 572 __ Jalr(entrypoint_.AsRegister<Register>());
[all...] |
| code_generator_mips64.cc | 529 __ Jalr(entrypoint_.AsRegister<GpuRegister>());
[all...] |
